ARM: dts: sk-rzg1e: add Ether pins
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Sat, 15 Apr 2017 20:18:28 +0000 (23:18 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 15 Aug 2017 16:00:17 +0000 (18:00 +0200)
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1E board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts

index 0cd908796055eb299a78cf8fbfccabf6b2be4f77..b4d679b04ad618a98337b9839b314a2d6ace4474 100644 (file)
                groups = "scif2_data";
                function = "scif2";
        };
+
+       ether_pins: ether {
+               groups = "eth_link", "eth_mdio", "eth_rmii";
+               function = "eth";
+       };
+
+       phy1_pins: phy1 {
+               groups = "intc_irq8";
+               function = "intc";
+       };
 };
 
 &scif2 {
@@ -49,6 +59,9 @@
 };
 
 &ether {
+       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-names = "default";
+
        phy-handle = <&phy1>;
        renesas,ether-link-active-low;
        status = "okay";