.map_io = sirfsoc_map_io,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
- .restart = sirfsoc_restart,
MACHINE_END
#endif
.dma_zone_size = SZ_256M,
.init_late = sirfsoc_init_late,
.dt_compat = prima2_dt_match,
- .restart = sirfsoc_restart,
MACHINE_END
#endif
.map_io = sirfsoc_map_io,
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
- .restart = sirfsoc_restart,
MACHINE_END
#endif
extern void sirfsoc_cpu_die(unsigned int cpu);
extern void __init sirfsoc_of_irq_init(void);
-extern void sirfsoc_restart(enum reboot_mode, const char *);
extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
#ifndef CONFIG_DEBUG_LL
#include <linux/reboot.h>
#include <linux/reset-controller.h>
+#include <asm/system_misc.h>
+
#define SIRFSOC_RSTBIT_NUM 64
-void __iomem *sirfsoc_rstc_base;
+static void __iomem *sirfsoc_rstc_base;
static DEFINE_MUTEX(rstc_lock);
static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
.nr_resets = SIRFSOC_RSTBIT_NUM,
};
+#define SIRFSOC_SYS_RST_BIT BIT(31)
+
+static void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
+{
+ writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
+}
+
static int sirfsoc_rstc_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
}
sirfsoc_reset_controller.of_node = np;
+ arm_pm_restart = sirfsoc_restart;
- reset_controller_register(&sirfsoc_reset_controller);
+ if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
+ reset_controller_register(&sirfsoc_reset_controller);
return 0;
}
return platform_driver_register(&sirfsoc_rstc_driver);
}
subsys_initcall(sirfsoc_rstc_init);
-
-#define SIRFSOC_SYS_RST_BIT BIT(31)
-
-void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
-{
- writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
-}