drm/rockchip: dw-mipi-dsi: fix generic packet status check
authorJohn Keeping <john@metanate.com>
Fri, 24 Feb 2017 12:54:48 +0000 (12:54 +0000)
committerSean Paul <seanpaul@chromium.org>
Wed, 1 Mar 2017 19:48:50 +0000 (14:48 -0500)
We want to check that both the GEN_CMD_EMPTY and GEN_PLD_W_EMPTY bits
are set so we can't just check "val & mask" because that will be true if
either bit is set.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-6-john@metanate.com
drivers/gpu/drm/rockchip/dw-mipi-dsi.c

index 4cbbbcb619b7861bf7aab9a4b6fde85049b7e399..4be1ff3a42bbf307ff08d11aa5119e7d3fb3033d 100644 (file)
@@ -545,7 +545,7 @@ static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host,
 static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
 {
        int ret;
-       u32 val;
+       u32 val, mask;
 
        ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
                                 val, !(val & GEN_CMD_FULL), 1000,
@@ -557,8 +557,9 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
 
        dsi_write(dsi, DSI_GEN_HDR, hdr_val);
 
+       mask = GEN_CMD_EMPTY | GEN_PLD_W_EMPTY;
        ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-                                val, val & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
+                                val, (val & mask) == mask,
                                 1000, CMD_PKT_STATUS_TIMEOUT_US);
        if (ret < 0) {
                dev_err(dsi->dev, "failed to write command FIFO\n");