arm/dts: OMAP3+: Add mpu, dsp and iva nodes
authorBenoit Cousson <b-cousson@ti.com>
Tue, 16 Aug 2011 09:49:08 +0000 (11:49 +0200)
committerBenoit Cousson <b-cousson@ti.com>
Tue, 4 Oct 2011 20:29:40 +0000 (22:29 +0200)
Add nodes for devices used by PM code (mpu, dsp, iva).

Add a cpus node as well as recommended in the DT spec.

Remove mpu, dsp, iva devices init if is populated.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Kevin Hilman <khilman@ti.com>
Documentation/devicetree/bindings/arm/omap/dsp.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/omap/iva.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/omap/mpu.txt [new file with mode: 0644]
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi
arch/arm/mach-omap2/pm.c

diff --git a/Documentation/devicetree/bindings/arm/omap/dsp.txt b/Documentation/devicetree/bindings/arm/omap/dsp.txt
new file mode 100644 (file)
index 0000000..d3830a3
--- /dev/null
@@ -0,0 +1,14 @@
+* TI - DSP (Digital Signal Processor)
+
+TI DSP included in OMAP SoC
+
+Required properties:
+- compatible : Should be "ti,omap3-c64" for OMAP3 & 4
+- ti,hwmods: "dsp"
+
+Examples:
+
+dsp {
+    compatible = "ti,omap3-c64";
+    ti,hwmods = "dsp";
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/iva.txt b/Documentation/devicetree/bindings/arm/omap/iva.txt
new file mode 100644 (file)
index 0000000..6d62951
--- /dev/null
@@ -0,0 +1,19 @@
+* TI - IVA (Imaging and Video Accelerator) subsystem
+
+The IVA contain various audio, video or imaging HW accelerator
+depending of the version.
+
+Required properties:
+- compatible : Should be:
+  - "ti,ivahd" for OMAP4
+  - "ti,iva2.2" for OMAP3
+  - "ti,iva2.1" for OMAP2430
+  - "ti,iva1" for OMAP2420
+- ti,hwmods: "iva"
+
+Examples:
+
+iva {
+    compatible = "ti,ivahd", "ti,iva";
+    ti,hwmods = "iva";
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt
new file mode 100644 (file)
index 0000000..1a5a42c
--- /dev/null
@@ -0,0 +1,27 @@
+* TI - MPU (Main Processor Unit) subsystem
+
+The MPU subsystem contain one or several ARM cores
+depending of the version.
+The MPU contain CPUs, GIC, L2 cache and a local PRCM.
+
+Required properties:
+- compatible : Should be "ti,omap3-mpu" for OMAP3
+               Should be "ti,omap4-mpu" for OMAP4
+- ti,hwmods: "mpu"
+
+Examples:
+
+- For an OMAP4 SMP system:
+
+mpu {
+    compatible = "ti,omap4-mpu";
+    ti,hwmods = "mpu";
+};
+
+
+- For an OMAP3 monocore system:
+
+mpu {
+    compatible = "ti,omap3-mpu";
+    ti,hwmods = "mpu";
+};
index d558785c8b2c622d497ac30e7e294e7fb27e38b2..d202bb5ec7efe3912cc9ea285bde04479741e4ef 100644 (file)
 / {
        compatible = "ti,omap3430", "ti,omap3";
 
+       cpus {
+               cpu@0 {
+                       compatible = "arm,cortex-a8";
+               };
+       };
+
        /*
         * The soc node represents the soc top level view. It is uses for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
                compatible = "ti,omap-infra";
+               mpu {
+                       compatible = "ti,omap3-mpu";
+                       ti,hwmods = "mpu";
+               };
+
+               iva {
+                       compatible = "ti,iva2.2";
+                       ti,hwmods = "iva";
+
+                       dsp {
+                               compatible = "ti,omap3-c64";
+                       };
+               };
        };
 
        /*
index b85a39debbeaf0b592a705eb491d192a9deb2127..4c61c829043ab4a38f26f791ad998e67a48d5b5d 100644 (file)
        aliases {
        };
 
+       cpus {
+               cpu@0 {
+                       compatible = "arm,cortex-a9";
+               };
+               cpu@1 {
+                       compatible = "arm,cortex-a9";
+               };
+       };
+
        /*
         * The soc node represents the soc top level view. It is uses for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
         */
        soc {
                compatible = "ti,omap-infra";
+               mpu {
+                       compatible = "ti,omap4-mpu";
+                       ti,hwmods = "mpu";
+               };
+
+               dsp {
+                       compatible = "ti,omap3-c64";
+                       ti,hwmods = "dsp";
+               };
+
+               iva {
+                       compatible = "ti,ivahd";
+                       ti,hwmods = "iva";
+               };
        };
 
        /*
index 9e78261fbfba8f36df93a33cb4ca299d219da2fe..2ab7a9e17fe2683889762494249f356c3b5beab0 100644 (file)
@@ -215,7 +215,8 @@ static void __init omap4_init_voltages(void)
 
 static int __init omap2_common_pm_init(void)
 {
-       omap2_init_processor_devices();
+       if (!of_have_populated_dt())
+               omap2_init_processor_devices();
        omap_pm_if_init();
 
        return 0;