[POWERPC] mpic: Deal with bogus NIRQ in Feature Reporting Register

Some chips (like the SoCs from Freescale) report the wrong value in NIRQ
and this causes issues if its doesn't match or exceed the value of
irq_count.

Add a flag that board code can set to just use irq_count instead of
FRR[NIRQ].  Eventually we'll add a device tree property with the number
of sources.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8619f2a3f1f637d685cf71d257fb47efd2f29f85..466e2183e86c6662bf46cdabf713b9408483cb0e 100644 (file)
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1144,9 +1144,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK)
                          >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
        if (isu_size == 0)
-               mpic->num_sources =
-                       ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
-                        >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+               if (flags & MPIC_BROKEN_FRR_NIRQS)
+                       mpic->num_sources = mpic->irq_count;
+               else
+                       mpic->num_sources =
+                               ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
+                                >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
 
        /* Map the per-CPU registers */
        for (i = 0; i < mpic->num_cpus; i++) {

diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 943c5a3fac8aefa3a8e412b77a223957f01c0e6b..6802570f4240a96d086dd5826c68ee677ce87a6a 100644 (file)
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -353,6 +353,8 @@ struct mpic
 #define MPIC_ENABLE_MCK                        0x00000200
 /* Disable bias among target selection, spread interrupts evenly */
 #define MPIC_NO_BIAS                   0x00000400
+/* Ignore NIRQS as reported by FRR */
+#define MPIC_BROKEN_FRR_NIRQS          0x00000800
 
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK               0xf0000000