omap3/4: Fix compile for multi-omap for clkops_noncore_dpll_ops
authorTony Lindgren <tony@atomide.com>
Mon, 15 Feb 2010 17:27:25 +0000 (09:27 -0800)
committerTony Lindgren <tony@atomide.com>
Mon, 15 Feb 2010 17:27:25 +0000 (09:27 -0800)
Rename clkops_noncore_dpll_ops for omap3 and omap4.

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock34xx.c
arch/arm/mach-omap2/clock34xx.h
arch/arm/mach-omap2/clock34xx_data.c
arch/arm/mach-omap2/clock44xx.c
arch/arm/mach-omap2/clock44xx.h
arch/arm/mach-omap2/clock44xx_data.c

index 1f1b5a6b3eea3cac740f7e06feda88b29264c102..ae9e2c82eb6a429aa5226b16fe325452c0ad1dd5 100644 (file)
@@ -130,7 +130,7 @@ const struct clkops clkops_omap3430es2_hsotgusb_wait = {
        .find_companion = omap2_clk_dflt_find_companion,
 };
 
-const struct clkops clkops_noncore_dpll_ops = {
+const struct clkops omap3_clkops_noncore_dpll_ops = {
        .enable         = omap3_noncore_dpll_enable,
        .disable        = omap3_noncore_dpll_disable,
 };
index 73f2109d643651fe3e58e9c9871a8d0c2d3e3449..313efc0e5a0ff5093d1da2729210b2dcc72584e8 100644 (file)
@@ -20,6 +20,6 @@ extern struct clk *arm_fck_p;
 extern const struct clkops clkops_omap3430es2_ssi_wait;
 extern const struct clkops clkops_omap3430es2_hsotgusb_wait;
 extern const struct clkops clkops_omap3430es2_dss_usbhost_wait;
-extern const struct clkops clkops_noncore_dpll_ops;
+extern const struct clkops omap3_clkops_noncore_dpll_ops;
 
 #endif
index 0d04f92f63e1e7728cdaba9c965f8739bea448ab..8728f1fbc5b1b82924de1b428249b12401b432f7 100644 (file)
@@ -337,7 +337,7 @@ static struct dpll_data dpll2_dd = {
 
 static struct clk dpll2_ck = {
        .name           = "dpll2_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll2_dd,
        .round_rate     = &omap2_dpll_round_rate,
@@ -554,7 +554,7 @@ static struct dpll_data dpll4_dd = {
 
 static struct clk dpll4_ck = {
        .name           = "dpll4_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll4_dd,
        .round_rate     = &omap2_dpll_round_rate,
@@ -854,7 +854,7 @@ static struct dpll_data dpll5_dd = {
 
 static struct clk dpll5_ck = {
        .name           = "dpll5_ck",
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap3_clkops_noncore_dpll_ops,
        .parent         = &sys_ck,
        .dpll_data      = &dpll5_dd,
        .round_rate     = &omap2_dpll_round_rate,
index c238717e37609c809783703a2a18301e8a00ae6e..84ee6b0c7995fd44d7c9499158520b74107554e3 100644 (file)
@@ -13,7 +13,7 @@
 #include <linux/errno.h>
 #include "clock.h"
 
-const struct clkops clkops_noncore_dpll_ops = {
+const struct clkops omap4_clkops_noncore_dpll_ops = {
        .enable         = &omap3_noncore_dpll_enable,
        .disable        = &omap3_noncore_dpll_disable,
 };
index 1f55b6b574fb45452ae5316e56d99f18ff0ec24d..efe849416aace0a13714a867e622b18b710a334e 100644 (file)
@@ -12,6 +12,6 @@
 
 int omap4xxx_clk_init(void);
 
-extern const struct clkops clkops_noncore_dpll_ops;
+extern const struct clkops omap4_clkops_noncore_dpll_ops;
 
 #endif
index 35ffe638def8188750af2e85182c760493d66fe3..86af31d80a347488965fbe61fc52d363ce16e21c 100644 (file)
@@ -279,7 +279,7 @@ static struct clk dpll_abe_ck = {
        .parent         = &abe_dpll_refclk_mux_ck,
        .dpll_data      = &dpll_abe_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
@@ -668,7 +668,7 @@ static struct clk dpll_iva_ck = {
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_iva_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
@@ -731,7 +731,7 @@ static struct clk dpll_mpu_ck = {
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_mpu_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
@@ -807,7 +807,7 @@ static struct clk dpll_per_ck = {
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_per_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
@@ -930,7 +930,7 @@ static struct clk dpll_unipro_ck = {
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_unipro_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,
@@ -988,7 +988,7 @@ static struct clk dpll_usb_ck = {
        .parent         = &dpll_sys_ref_clk,
        .dpll_data      = &dpll_usb_dd,
        .init           = &omap2_init_dpll_parent,
-       .ops            = &clkops_noncore_dpll_ops,
+       .ops            = &omap4_clkops_noncore_dpll_ops,
        .recalc         = &omap3_dpll_recalc,
        .round_rate     = &omap2_dpll_round_rate,
        .set_rate       = &omap3_noncore_dpll_set_rate,