irqs += per_cpu(irq_stat, cpu).apic_timer_irqs;
#endif
- return irqs;
+ return irqs;
}
static inline int mce_in_progress(void)
{
#if defined(CONFIG_X86_MCE)
- return atomic_read(&mce_entry) > 0;
+ return atomic_read(&mce_entry) > 0;
#endif
- return 0;
+ return 0;
}
int hw_nmi_is_cpu_stuck(struct pt_regs *regs)
}
/* if we are doing an mce, just assume the cpu is not stuck */
- /* Could check oops_in_progress here too, but it's safer not to */
- if (mce_in_progress())
- return 0;
+ /* Could check oops_in_progress here too, but it's safer not to */
+ if (mce_in_progress())
+ return 0;
/* We determine if the cpu is stuck by checking whether any
* interrupts have happened since we last checked. Of course
u64 hw_nmi_get_sample_period(void)
{
- return cpu_khz * 1000;
+ return cpu_khz * 1000;
}
#ifdef ARCH_HAS_NMI_WATCHDOG
static int __init setup_nmi_watchdog(char *str)
{
- if (!strncmp(str, "panic", 5)) {
- panic_on_timeout = 1;
- str = strchr(str, ',');
- if (!str)
- return 1;
- ++str;
- }
- return 1;
+ if (!strncmp(str, "panic", 5)) {
+ panic_on_timeout = 1;
+ str = strchr(str, ',');
+ if (!str)
+ return 1;
+ ++str;
+ }
+ return 1;
}
__setup("nmi_watchdog=", setup_nmi_watchdog);
struct perf_event_attr wd_hw_attr = {
- .type = PERF_TYPE_HARDWARE,
- .config = PERF_COUNT_HW_CPU_CYCLES,
- .size = sizeof(struct perf_event_attr),
- .pinned = 1,
- .disabled = 1,
+ .type = PERF_TYPE_HARDWARE,
+ .config = PERF_COUNT_HW_CPU_CYCLES,
+ .size = sizeof(struct perf_event_attr),
+ .pinned = 1,
+ .disabled = 1,
};
struct perf_event_attr wd_sw_attr = {
- .type = PERF_TYPE_SOFTWARE,
- .config = PERF_COUNT_SW_CPU_CLOCK,
- .size = sizeof(struct perf_event_attr),
- .pinned = 1,
- .disabled = 1,
+ .type = PERF_TYPE_SOFTWARE,
+ .config = PERF_COUNT_SW_CPU_CLOCK,
+ .size = sizeof(struct perf_event_attr),
+ .pinned = 1,
+ .disabled = 1,
};
void wd_overflow(struct perf_event *event, int nmi,
* Ayiee, looks like this CPU is stuck ...
* wait a few IRQs (5 seconds) before doing the oops ...
*/
- per_cpu(alert_counter,cpu) += 1;
- if (per_cpu(alert_counter,cpu) == 5) {
- if (panic_on_timeout) {
+ per_cpu(alert_counter, cpu) += 1;
+ if (per_cpu(alert_counter, cpu) == 5) {
+ if (panic_on_timeout)
panic("NMI Watchdog detected LOCKUP on cpu %d", cpu);
- } else {
+ else
WARN(1, "NMI Watchdog detected LOCKUP on cpu %d", cpu);
- }
}
} else {
- per_cpu(alert_counter,cpu) = 0;
+ per_cpu(alert_counter, cpu) = 0;
}
return;
event = perf_event_create_kernel_counter(wd_attr, cpu, -1, wd_overflow);
if (IS_ERR(event)) {
/* hardware doesn't exist or not supported, fallback to software events */
- printk("nmi_watchdog: hardware not available, trying software events\n");
+ printk(KERN_INFO "nmi_watchdog: hardware not available, trying software events\n");
wd_attr = &wd_sw_attr;
wd_attr->sample_period = NSEC_PER_SEC;
event = perf_event_create_kernel_counter(wd_attr, cpu, -1, wd_overflow);
if (nmi_watchdog_enabled) {
for_each_online_cpu(cpu)
if (enable_nmi_watchdog(cpu)) {
- printk("NMI watchdog failed configuration, "
+ printk(KERN_ERR "NMI watchdog failed configuration, "
" can not be enabled\n");
}
} else {