drm/ttm: Add some powerpc cache flush code.
authorMichel Dänzer <daenzer@vmware.com>
Mon, 15 Jun 2009 14:56:13 +0000 (16:56 +0200)
committerDave Airlie <airlied@redhat.com>
Thu, 18 Jun 2009 23:24:53 +0000 (09:24 +1000)
Optimise the powerpc flushing path for TTM.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/ttm/ttm_tt.c

index c27ab3a877adbac9c80f37ce9a1fc4698f5f8a8a..0331fa74cd3f137396bfa79f9683a709e3ddad45 100644 (file)
@@ -68,7 +68,7 @@ static void ttm_tt_cache_flush_clflush(struct page *pages[],
                ttm_tt_clflush_page(*pages++);
        mb();
 }
-#else
+#elif !defined(__powerpc__)
 static void ttm_tt_ipi_handler(void *null)
 {
        ;
@@ -83,6 +83,15 @@ void ttm_tt_cache_flush(struct page *pages[], unsigned long num_pages)
                ttm_tt_cache_flush_clflush(pages, num_pages);
                return;
        }
+#elif defined(__powerpc__)
+       unsigned long i;
+
+       for (i = 0; i < num_pages; ++i) {
+               if (pages[i]) {
+                       unsigned long start = (unsigned long)page_address(pages[i]);
+                       flush_dcache_range(start, start + PAGE_SIZE);
+               }
+       }
 #else
        if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0)
                printk(KERN_ERR TTM_PFX