#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
#include <linux/io.h>
enum {
.resource = eth_resources,
};
-static struct sh_cmt_config cmt0_platform_data = {
+static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
-static struct sh_cmt_config cmt1_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
-#include <linux/sh_mtu2.h>
+#include <linux/sh_timer.h>
enum {
UNUSED = 0,
static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
mask_registers, prio_registers, NULL);
-static struct sh_mtu2_config mtu2_0_platform_data = {
+static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
-static struct sh_mtu2_config mtu2_1_platform_data = {
+static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
-static struct sh_mtu2_config mtu2_2_platform_data = {
+static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
-#include <linux/sh_mtu2.h>
+#include <linux/sh_timer.h>
#include <linux/io.h>
enum {
.resource = rtc_resources,
};
-static struct sh_mtu2_config mtu2_0_platform_data = {
+static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
-static struct sh_mtu2_config mtu2_1_platform_data = {
+static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
-static struct sh_mtu2_config mtu2_2_platform_data = {
+static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
-#include <linux/sh_cmt.h>
-#include <linux/sh_mtu2.h>
+#include <linux/sh_timer.h>
#include <linux/io.h>
enum {
},
};
-static struct sh_cmt_config cmt0_platform_data = {
+static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
-static struct sh_cmt_config cmt1_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
-static struct sh_mtu2_config mtu2_0_platform_data = {
+static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
-static struct sh_mtu2_config mtu2_1_platform_data = {
+static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
-#include <linux/sh_cmt.h>
-#include <linux/sh_mtu2.h>
+#include <linux/sh_timer.h>
#include <linux/io.h>
enum {
},
};
-static struct sh_cmt_config cmt0_platform_data = {
+static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
-static struct sh_cmt_config cmt1_platform_data = {
+static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
-static struct sh_mtu2_config mtu2_0_platform_data = {
+static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
-static struct sh_mtu2_config mtu2_1_platform_data = {
+static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
-static struct sh_mtu2_config mtu2_2_platform_data = {
+static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
#include <asm/clock.h>
static struct resource iic0_resources[] = {
.num_resources = ARRAY_SIZE(jpu_resources),
};
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
#include <asm/clock.h>
static struct resource iic_resources[] = {
.num_resources = ARRAY_SIZE(veu1_resources),
};
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
#include <linux/serial_sci.h>
#include <linux/mm.h>
#include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
-#include <linux/sh_tmu.h>
+#include <linux/sh_timer.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
.num_resources = ARRAY_SIZE(jpu_resources),
};
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.num_resources = ARRAY_SIZE(cmt_resources),
};
-static struct sh_tmu_config tmu0_platform_data = {
+static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.num_resources = ARRAY_SIZE(tmu0_resources),
};
-static struct sh_tmu_config tmu1_platform_data = {
+static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
-static struct sh_tmu_config tmu2_platform_data = {
+static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
#include <linux/mm.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
.num_resources = ARRAY_SIZE(veu1_resources),
};
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
#include <linux/mm.h>
#include <linux/serial_sci.h>
#include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
#include <linux/io.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
.num_resources = ARRAY_SIZE(veu1_resources),
};
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
#include <linux/err.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
struct sh_cmt_priv {
void __iomem *mapbase;
static inline unsigned long sh_cmt_read(struct sh_cmt_priv *p, int reg_nr)
{
- struct sh_cmt_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static inline void sh_cmt_write(struct sh_cmt_priv *p, int reg_nr,
unsigned long value)
{
- struct sh_cmt_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
{
- struct sh_cmt_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
unsigned long flags, value;
/* start stop register shared by multiple timer channels */
static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
{
- struct sh_cmt_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
int ret;
/* enable clock */
static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
{
- struct sh_cmt_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
struct resource *res;
int irq, ret;
ret = -ENXIO;
static int __devinit sh_cmt_probe(struct platform_device *pdev)
{
struct sh_cmt_priv *p = platform_get_drvdata(pdev);
- struct sh_cmt_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
int ret;
if (p) {
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/clockchips.h>
-#include <linux/sh_mtu2.h>
+#include <linux/sh_timer.h>
struct sh_mtu2_priv {
void __iomem *mapbase;
static inline unsigned long sh_mtu2_read(struct sh_mtu2_priv *p, int reg_nr)
{
- struct sh_mtu2_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static inline void sh_mtu2_write(struct sh_mtu2_priv *p, int reg_nr,
unsigned long value)
{
- struct sh_mtu2_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
{
- struct sh_mtu2_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
unsigned long flags, value;
/* start stop register shared by multiple timer channels */
static int sh_mtu2_enable(struct sh_mtu2_priv *p)
{
- struct sh_mtu2_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
int ret;
/* enable clock */
static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
{
- struct sh_mtu2_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
struct resource *res;
int irq, ret;
ret = -ENXIO;
static int __devinit sh_mtu2_probe(struct platform_device *pdev)
{
struct sh_mtu2_priv *p = platform_get_drvdata(pdev);
- struct sh_mtu2_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
int ret;
if (p) {
#include <linux/err.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
-#include <linux/sh_tmu.h>
+#include <linux/sh_timer.h>
struct sh_tmu_priv {
void __iomem *mapbase;
static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
{
- struct sh_tmu_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
unsigned long value)
{
- struct sh_tmu_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs;
static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
{
- struct sh_tmu_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
unsigned long flags, value;
/* start stop register shared by multiple timer channels */
static int sh_tmu_enable(struct sh_tmu_priv *p)
{
- struct sh_tmu_config *cfg = p->pdev->dev.platform_data;
+ struct sh_timer_config *cfg = p->pdev->dev.platform_data;
int ret;
/* enable clock */
static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
{
- struct sh_tmu_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
struct resource *res;
int irq, ret;
ret = -ENXIO;
static int __devinit sh_tmu_probe(struct platform_device *pdev)
{
struct sh_tmu_priv *p = platform_get_drvdata(pdev);
- struct sh_tmu_config *cfg = pdev->dev.platform_data;
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
int ret;
if (p) {
+++ /dev/null
-#ifndef __SH_CMT_H__
-#define __SH_CMT_H__
-
-struct sh_cmt_config {
- char *name;
- unsigned long channel_offset;
- int timer_bit;
- char *clk;
- unsigned long clockevent_rating;
- unsigned long clocksource_rating;
-};
-
-#endif /* __SH_CMT_H__ */
+++ /dev/null
-#ifndef __SH_MTU2_H__
-#define __SH_MTU2_H__
-
-struct sh_mtu2_config {
- char *name;
- int channel_offset;
- int timer_bit;
- char *clk;
- unsigned long clockevent_rating;
-};
-
-#endif /* __SH_MTU2_H__ */
--- /dev/null
+#ifndef __SH_TIMER_H__
+#define __SH_TIMER_H__
+
+struct sh_timer_config {
+ char *name;
+ long channel_offset;
+ int timer_bit;
+ char *clk;
+ unsigned long clockevent_rating;
+ unsigned long clocksource_rating;
+};
+
+#endif /* __SH_TIMER_H__ */
+++ /dev/null
-#ifndef __SH_TMU_H__
-#define __SH_TMU_H__
-
-struct sh_tmu_config {
- char *name;
- unsigned long channel_offset;
- int timer_bit;
- char *clk;
- unsigned long clockevent_rating;
- unsigned long clocksource_rating;
-};
-
-#endif /* __SH_TMU_H__ */