drm/i915: Simplify ilk_get_aux_clock_divider
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 31 Mar 2015 11:11:59 +0000 (14:11 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 31 Mar 2015 15:28:50 +0000 (17:28 +0200)
Now that we are "extracting" the cdclk frequency on ILK-IVB we
can also simplify ilk_get_aux_clock_divider() to calculate the
divider based on cdclk instead of hardcoding the values.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c

index b70e635ccaf4f249c7527dbc9c2c2a39d3530143..fd9fc3c6a72cc0f74fc69647774db89a19175e01 100644 (file)
@@ -696,15 +696,13 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 {
        struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = intel_dig_port->base.base.dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
 
        if (index)
                return 0;
 
        if (intel_dig_port->port == PORT_A) {
-               if (IS_GEN6(dev) || IS_GEN7(dev))
-                       return 200; /* SNB & IVB eDP input clock at 400Mhz */
-               else
-                       return 225; /* eDP input clock at 450Mhz */
+               return DIV_ROUND_UP(dev_priv->display.get_display_clock_speed(dev), 2000);
        } else {
                return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
        }