#endif
#endif /* CONFIG_PPC64 */
- void (*pci_dma_dev_setup)(struct pci_dev *dev);
- void (*pci_dma_bus_setup)(struct pci_bus *bus);
-
/* Platform set_dma_mask and dma_get_required_mask overrides */
int (*dma_set_mask)(struct device *dev, u64 dma_mask);
u64 (*dma_get_required_mask)(struct device *dev);
/* PCI stuff */
/* Called after allocating resources */
void (*pcibios_fixup)(void);
- int (*pci_probe_mode)(struct pci_bus *);
void (*pci_irq_fixup)(struct pci_dev *dev);
int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
*bridge);
/* Called for each PCI bus in the system when it's probed */
void (*pcibios_fixup_bus)(struct pci_bus *);
- /* Called when pci_enable_device() is called. Returns true to
- * allow assignment/enabling of the device. */
- bool (*pcibios_enable_device_hook)(struct pci_dev *);
-
/* Called after scan and before resource survey */
void (*pcibios_fixup_phb)(struct pci_controller *hose);
- /* Called during PCI resource reassignment */
- resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);
-
- /* Reset the secondary bus of bridge */
- void (*pcibios_reset_secondary_bus)(struct pci_dev *dev);
-
/* Called to shutdown machine specific hardware not already controlled
* by other drivers.
*/
#include <linux/ioport.h>
#include <asm-generic/pci-bridge.h>
-/* Return values for pci_controller_ops.probe_mode function */
-#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
-#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
-#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
-
struct device_node;
/*
}
#endif /* CONFIG_PCI */
-/*
- * Shims to prefer pci_controller version over ppc_md where available.
- */
-static inline void pci_dma_dev_setup(struct pci_dev *dev)
-{
- struct pci_controller *phb = pci_bus_to_host(dev->bus);
-
- if (phb->controller_ops.dma_dev_setup)
- phb->controller_ops.dma_dev_setup(dev);
- else if (ppc_md.pci_dma_dev_setup)
- ppc_md.pci_dma_dev_setup(dev);
-}
-
-static inline void pci_dma_bus_setup(struct pci_bus *bus)
-{
- struct pci_controller *phb = pci_bus_to_host(bus);
-
- if (phb->controller_ops.dma_bus_setup)
- phb->controller_ops.dma_bus_setup(bus);
- else if (ppc_md.pci_dma_bus_setup)
- ppc_md.pci_dma_bus_setup(bus);
-}
-
-static inline int pci_probe_mode(struct pci_bus *bus)
-{
- struct pci_controller *phb = pci_bus_to_host(bus);
-
- if (phb->controller_ops.probe_mode)
- return phb->controller_ops.probe_mode(bus);
- if (ppc_md.pci_probe_mode)
- return ppc_md.pci_probe_mode(bus);
- return PCI_PROBE_NORMAL;
-}
-
-static inline bool pcibios_enable_device_hook(struct pci_dev *dev)
-{
- struct pci_controller *phb = pci_bus_to_host(dev->bus);
-
- if (phb->controller_ops.enable_device_hook)
- return phb->controller_ops.enable_device_hook(dev);
- if (ppc_md.pcibios_enable_device_hook)
- return ppc_md.pcibios_enable_device_hook(dev);
- return true;
-}
-
-static inline resource_size_t pci_window_alignment(struct pci_bus *bus,
- unsigned long type)
-{
- struct pci_controller *phb = pci_bus_to_host(bus);
-
- if (phb->controller_ops.window_alignment)
- return phb->controller_ops.window_alignment(bus, type);
- if (ppc_md.pcibios_window_alignment)
- return ppc_md.pcibios_window_alignment(bus, type);
-
- /*
- * PCI core will figure out the default
- * alignment: 4KiB for I/O and 1MiB for
- * memory window.
- */
- return 1;
-}
-
-static inline void pcibios_reset_secondary_bus_shim(struct pci_dev *dev)
-{
- struct pci_controller *phb = pci_bus_to_host(dev->bus);
-
- if (phb->controller_ops.reset_secondary_bus)
- phb->controller_ops.reset_secondary_bus(dev);
- else if (ppc_md.pcibios_reset_secondary_bus)
- ppc_md.pcibios_reset_secondary_bus(dev);
- else
- /*
- * Fallback to the generic function if no
- * platform-specific one is provided
- */
- pci_reset_secondary_bus(dev);
-}
-
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_PCI_BRIDGE_H */
#include <asm-generic/pci-dma-compat.h>
+/* Return values for pci_controller_ops.probe_mode function */
+#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
+#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
+#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
+
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x10000000
resource_size_t pcibios_window_alignment(struct pci_bus *bus,
unsigned long type)
{
- return pci_window_alignment(bus, type);
+ struct pci_controller *phb = pci_bus_to_host(bus);
+
+ if (phb->controller_ops.window_alignment)
+ return phb->controller_ops.window_alignment(bus, type);
+
+ /*
+ * PCI core will figure out the default
+ * alignment: 4KiB for I/O and 1MiB for
+ * memory window.
+ */
+ return 1;
}
void pcibios_reset_secondary_bus(struct pci_dev *dev)
{
- pcibios_reset_secondary_bus_shim(dev);
+ struct pci_controller *phb = pci_bus_to_host(dev->bus);
+
+ if (phb->controller_ops.reset_secondary_bus) {
+ phb->controller_ops.reset_secondary_bus(dev);
+ return;
+ }
+
+ pci_reset_secondary_bus(dev);
}
static resource_size_t pcibios_io_size(const struct pci_controller *hose)
void pcibios_setup_bus_self(struct pci_bus *bus)
{
+ struct pci_controller *phb;
+
/* Fix up the bus resources for P2P bridges */
if (bus->self != NULL)
pcibios_fixup_bridge(bus);
ppc_md.pcibios_fixup_bus(bus);
/* Setup bus DMA mappings */
- pci_dma_bus_setup(bus);
+ phb = pci_bus_to_host(bus);
+ if (phb->controller_ops.dma_bus_setup)
+ phb->controller_ops.dma_bus_setup(bus);
}
static void pcibios_setup_device(struct pci_dev *dev)
{
+ struct pci_controller *phb;
/* Fixup NUMA node as it may not be setup yet by the generic
* code and is needed by the DMA init
*/
set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
/* Additional platform DMA/iommu setup */
- pci_dma_dev_setup(dev);
+ phb = pci_bus_to_host(dev->bus);
+ if (phb->controller_ops.dma_dev_setup)
+ phb->controller_ops.dma_dev_setup(dev);
/* Read default IRQs and fixup if necessary */
pci_read_irq_line(dev);
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
- if (!pcibios_enable_device_hook(dev))
- return -EINVAL;
+ struct pci_controller *phb = pci_bus_to_host(dev->bus);
+
+ if (phb->controller_ops.enable_device_hook)
+ if (!phb->controller_ops.enable_device_hook(dev))
+ return -EINVAL;
return pci_enable_resources(dev, mask);
}
/* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
- if (node)
- mode = pci_probe_mode(bus);
+ if (node && hose->controller_ops.probe_mode)
+ mode = hose->controller_ops.probe_mode(bus);
pr_debug(" probe mode: %d\n", mode);
if (mode == PCI_PROBE_DEVTREE)
of_scan_bus(node, bus);
{
int slotno, mode, pass, max;
struct pci_dev *dev;
+ struct pci_controller *phb;
struct device_node *dn = pci_bus_to_OF_node(bus);
eeh_add_device_tree_early(PCI_DN(dn));
+ phb = pci_bus_to_host(bus);
+
mode = PCI_PROBE_NORMAL;
- mode = pci_probe_mode(bus);
+ if (phb->controller_ops.probe_mode)
+ mode = phb->controller_ops.probe_mode(bus);
if (mode == PCI_PROBE_DEVTREE) {
/* use ofdt-based probe */
{
struct device_node *node = dev->dev.of_node;
struct pci_bus *bus;
+ struct pci_controller *phb;
const __be32 *busrange, *ranges;
int len, i, mode;
struct pci_bus_region region;
bus->number);
pr_debug(" bus name: %s\n", bus->name);
+ phb = pci_bus_to_host(bus);
+
mode = PCI_PROBE_NORMAL;
- mode = pci_probe_mode(bus);
+ if (phb->controller_ops.probe_mode)
+ mode = phb->controller_ops.probe_mode(bus);
pr_debug(" probe mode: %d\n", mode);
if (mode == PCI_PROBE_DEVTREE)
if (controller_ops) {
controller_ops->dma_dev_setup = pci_dma_dev_setup_dart;
controller_ops->dma_bus_setup = pci_dma_bus_setup_dart;
- } else {
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart;
- ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart;
}
/* Setup pci_dma ops */
set_pci_dma_ops(&dma_iommu_ops);
controller_ops->dma_dev_setup = NULL;
controller_ops->dma_bus_setup = NULL;
}
- ppc_md.pci_dma_dev_setup = NULL;
- ppc_md.pci_dma_bus_setup = NULL;
/* Setup pci_dma ops */
set_pci_dma_ops(&dma_direct_ops);