PCI: rockchip: Fix negotiated lanes calculation

The calculation of negotiated lanes is wrong: it should be shifted by
PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted by
PCIE_CORE_PL_CONF_LANE_MASK instead.  Let's fix it.

Fixes: e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index b296808ccc7134d27805a97d092421e2be43b6ff..f641a4e6f605f4ec5c0980eb002dac9bdb78254b 100644 (file)
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -636,8 +636,8 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 
        /* Check the final link width from negotiated lane counter from MGMT */
        status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL);
-       status =  0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
-                         PCIE_CORE_PL_CONF_LANE_MASK);
+       status = 0x1 << ((status & PCIE_CORE_PL_CONF_LANE_MASK) >>
+                         PCIE_CORE_PL_CONF_LANE_SHIFT);
        dev_dbg(dev, "current link width is x%d\n", status);
 
        rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,