Davinci: cpintc host map configuration
authorCyril Chemparathy <cyril@ti.com>
Thu, 25 Mar 2010 21:43:46 +0000 (17:43 -0400)
committerKevin Hilman <khilman@deeprootsystems.com>
Thu, 6 May 2010 22:02:04 +0000 (15:02 -0700)
Host map configuration instructs the interrupt controller to route interrupt
channels to FIQ or IRQ lines.  Currently, DA8xx family of devices leave these
registers at their reset-default values.

TNETV107X however does not have sane reset defaults, and therefore this
architecture needs to reconfigure the host-map such that channels 0 and 1
go to FIQ, and the remaining channels raise IRQs.

This patch adds an optional host map argument to cp_intc_init() for this.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-davinci/board-da830-evm.c
arch/arm/mach-davinci/board-da850-evm.c
arch/arm/mach-davinci/cp_intc.c
arch/arm/mach-davinci/include/mach/cp_intc.h

index ea293b8a596a1f7adfff2385978668bceb5f1c7d..db5ac0f3788eb2241dd36b8045c3c24f187e0435 100644 (file)
@@ -569,7 +569,7 @@ static __init void da830_evm_irq_init(void)
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
        cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
-                       soc_info->intc_irq_prios);
+                       soc_info->intc_irq_prios, NULL);
 }
 
 static void __init da830_evm_map_io(void)
index 411284d0b0faab646d6c39d1d0fe8c5259ca70fd..ef691ae5e67a476dc9bd378e0c0a452e73ba6c65 100644 (file)
@@ -741,7 +741,7 @@ static __init void da850_evm_irq_init(void)
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
        cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
-                       soc_info->intc_irq_prios);
+                       soc_info->intc_irq_prios, NULL);
 }
 
 static void __init da850_evm_map_io(void)
index 37311d1830eb4cd0752539431c3051e7ef44bbdf..2a8d26ee4bbfe7d5767ef328baf7eae07eac2ac9 100644 (file)
@@ -101,7 +101,7 @@ static struct irq_chip cp_intc_irq_chip = {
 };
 
 void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
-                        u8 *irq_prio)
+                        u8 *irq_prio, u32 *host_map)
 {
        unsigned num_reg        = BITS_TO_LONGS(num_irq);
        int i;
@@ -157,6 +157,10 @@ void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
                        cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
        }
 
+       if (host_map)
+               for (i = 0; host_map[i] != -1; i++)
+                       cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
+
        /* Set up genirq dispatching for cp_intc */
        for (i = 0; i < num_irq; i++) {
                set_irq_chip(i, &cp_intc_irq_chip);
index c4d27eec806407bd36776019a7c3820c2e9f4f42..121b114df7553e4529871b862abe215a6ddd5e61 100644 (file)
@@ -52,6 +52,6 @@
 #define CP_INTC_VECTOR_ADDR(n)         (0x2000 + (n << 2))
 
 void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
-                        u8 *irq_prio);
+                        u8 *irq_prio, u32 *host_map);
 
 #endif /* __ASM_HARDWARE_CP_INTC_H */