pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 13 Dec 2018 13:41:11 +0000 (14:41 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 5 Dec 2019 14:37:31 +0000 (15:37 +0100)
[ Upstream commit 054f2400f706327f96770219c3065b5131f8f154 ]

Some values in the Peripheral Function Select Register 10 descriptor are
shifted by one position, which may cause a peripheral function to be
programmed incorrectly.

Fixing this makes all HSCIF0 pins use Function 4 (value 3), like was
already the case for the HSCK0 pin in field IP10[5:3].

Fixes: ac1ebc2190f575fc ("sh-pfc: Add sh7734 pinmux support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pinctrl/sh-pfc/pfc-sh7734.c

index 6502e676d368617927c9cf55be7fea2ea31697e8..33232041ee86dd3ea34afef3f7f98850f43ceba8 100644 (file)
@@ -2213,22 +2213,22 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
            /* IP10_22 [1] */
                FN_CAN_CLK_A, FN_RX4_D,
            /* IP10_21_19 [3] */
-               FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B,
-               FN_LCD_M_DISP_B, 0, 0, 0,
+               FN_AUDIO_CLKOUT, FN_TX1_E, 0, FN_HRTS0_C, FN_FSE_B,
+               FN_LCD_M_DISP_B, 0, 0,
            /* IP10_18_16 [3] */
-               FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B,
-               FN_LCD_VEPWC_B, 0, 0, 0,
+               FN_AUDIO_CLKC, FN_SCK1_E, 0, FN_HCTS0_C, FN_FRB_B,
+               FN_LCD_VEPWC_B, 0, 0,
            /* IP10_15 [1] */
                FN_AUDIO_CLKB_A, FN_LCD_CLK_B,
            /* IP10_14_12 [3] */
                FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B,
                FN_LCD_FLM_B, 0, 0, 0,
            /* IP10_11_9 [3] */
-               FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B,
-               FN_LCD_CL2_B, 0, 0, 0,
+               FN_SSI_SDATA3, FN_VI1_7_B, 0, FN_HTX0_C, FN_FWE_B,
+               FN_LCD_CL2_B, 0, 0,
            /* IP10_8_6 [3] */
-               FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B,
-               FN_LCD_CL1_B, 0, 0, 0,
+               FN_SSI_SDATA2, FN_VI1_6_B, 0, FN_HRX0_C, FN_FRE_B,
+               FN_LCD_CL1_B, 0, 0,
            /* IP10_5_3 [3] */
                FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B,
                FN_LCD_DON_B, 0, 0, 0,