drm/amd/amdgpu: get maximum and used UVD handles (v4)

Change History
--------------

v4: Changes suggested by Emil, Christian
- return -ENODATA for asics with unlimited sessions

v3: changes suggested by Christian
- Add a check for UVD IP block using AMDGPU_HW_IP_UVD
  query type.
- Add a check for asic_type to be less than
  CHIP_POLARIS10 since starting Polaris, we support
  unlimited UVD instances.
- Add kerneldoc style comment for
  amdgpu_uvd_used_handles().

v2: as suggested by Christian
- Add a new query AMDGPU_INFO_NUM_HANDLES
- Create a helper function to return the number
  of currently used UVD handles.
- Modify the logic to count the number of used
  UVD handles since handles can be freed in
  non-linear fashion.

v1:
- User might want to query the maximum number of UVD
  instances supported by firmware. In addition to that,
  if there are multiple applications using UVD handles
  at the same time, he might also want to query the
  currently used number of handles.

  For this we add two variables max_handles and
  used_handles inside drm_amdgpu_info_hw_ip. So now
  an application (or libdrm) can use AMDGPU_INFO IOCTL
  with AMDGPU_INFO_HW_IP_INFO query type to get these
  values.

Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 8aef2582888823f38df9e48d081bf9293733f899..43169ab61a7862991db6ca5da9946e60e3b634c4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -569,6 +569,27 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                        return -EINVAL;
                }
        }
+       case AMDGPU_INFO_NUM_HANDLES: {
+               struct drm_amdgpu_info_num_handles handle;
+
+               switch (info->query_hw_ip.type) {
+               case AMDGPU_HW_IP_UVD:
+                       /* Starting Polaris, we support unlimited UVD handles */
+                       if (adev->asic_type < CHIP_POLARIS10) {
+                               handle.uvd_max_handles = adev->uvd.max_handles;
+                               handle.uvd_used_handles = amdgpu_uvd_used_handles(adev);
+
+                               return copy_to_user(out, &handle,
+                                       min((size_t)size, sizeof(handle))) ? -EFAULT : 0;
+                       } else {
+                               return -ENODATA;
+                       }
+
+                       break;
+               default:
+                       return -EINVAL;
+               }
+       }
        default:
                DRM_DEBUG_KMS("Invalid request %d\n", info->query);
                return -EINVAL;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 1d564beb0fde67541eab9be4ee76a39eb89197e1..326b7f5a79ffb2d6c999bb692ea21d55f3b8a33f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1178,3 +1178,28 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 error:
        return r;
 }
+
+/**
+ * amdgpu_uvd_used_handles - returns used UVD handles
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Returns the number of UVD handles in use
+ */
+uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev)
+{
+       unsigned i;
+       uint32_t used_handles = 0;
+
+       for (i = 0; i < adev->uvd.max_handles; ++i) {
+               /*
+                * Handles can be freed in any order, and not
+                * necessarily linear. So we need to count
+                * all non-zero handles.
+                */
+               if (atomic_read(&adev->uvd.handles[i]))
+                       used_handles++;
+       }
+
+       return used_handles;
+}

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index 6249ba1bde2a86550003909c632c1144ab06aa37..c10682baccae188d921eec2b4e321b197a49f836 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -38,5 +38,6 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx);
 void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring);
 void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring);
 int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout);
+uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev);
 
 #endif

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 396183628f3c5f9882126e6549af8a1ebc567c27..5797283c2d79b918eaef665f053d76cdd3e0d36d 100644 (file)
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -528,6 +528,8 @@ struct drm_amdgpu_cs_chunk_data {
        #define AMDGPU_INFO_VBIOS_SIZE          0x1
        /* Subquery id: Query vbios image */
        #define AMDGPU_INFO_VBIOS_IMAGE         0x2
+/* Query UVD handles */
+#define AMDGPU_INFO_NUM_HANDLES                        0x1C
 
 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
 #define AMDGPU_INFO_MMR_SE_INDEX_MASK  0xff
@@ -719,6 +721,13 @@ struct drm_amdgpu_info_hw_ip {
        __u32  _pad;
 };
 
+struct drm_amdgpu_info_num_handles {
+       /** Max handles as supported by firmware for UVD */
+       __u32  uvd_max_handles;
+       /** Handles currently in use for UVD */
+       __u32  uvd_used_handles;
+};
+
 #define AMDGPU_VCE_CLOCK_TABLE_ENTRIES         6
 
 struct drm_amdgpu_info_vce_clock_table_entry {