phy: Add Northstar2 PCI Phy support
authorPramod Kumar <pramod.kumar@broadcom.com>
Fri, 10 Jun 2016 05:33:51 +0000 (11:03 +0530)
committerDavid S. Miller <davem@davemloft.net>
Sat, 11 Jun 2016 06:24:54 +0000 (23:24 -0700)
Add PCI Phy support for Broadcom Northstar2 SoCs.  This driver uses the
interface from the iproc mdio mux driver to enable the devices
respective phys.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/phy/Kconfig
drivers/phy/Makefile
drivers/phy/phy-bcm-ns2-pcie.c [new file with mode: 0644]

index b869b98835f4f5c4e4f3df5dfc998427af13a452..01fb93b4b1e4e35ce72738ff1c2d61ec35492c63 100644 (file)
@@ -434,4 +434,12 @@ config PHY_CYGNUS_PCIE
 
 source "drivers/phy/tegra/Kconfig"
 
+config PHY_NS2_PCIE
+       tristate "Broadcom Northstar2 PCIe PHY driver"
+       depends on OF && MDIO_BUS_MUX_BCM_IPROC
+       select GENERIC_PHY
+       default ARCH_BCM_IPROC
+       help
+         Enable this to support the Broadcom Northstar2 PCIe PHY.
+         If unsure, say N.
 endmenu
index 9c3e73ccabc4193c92f02e3b077959b987d76a70..7aea094da3e2e36a133ef425287bb432151f5a13 100644 (file)
@@ -53,5 +53,5 @@ obj-$(CONFIG_PHY_TUSB1210)            += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)            += phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)                += phy-pistachio-usb.o
 obj-$(CONFIG_PHY_CYGNUS_PCIE)          += phy-bcm-cygnus-pcie.o
-
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_PHY_NS2_PCIE)             += phy-bcm-ns2-pcie.o
diff --git a/drivers/phy/phy-bcm-ns2-pcie.c b/drivers/phy/phy-bcm-ns2-pcie.c
new file mode 100644 (file)
index 0000000..9513f7a
--- /dev/null
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_mdio.h>
+#include <linux/mdio.h>
+#include <linux/phy.h>
+#include <linux/phy/phy.h>
+
+struct ns2_pci_phy {
+       struct mdio_device *mdiodev;
+       struct phy *phy;
+};
+
+#define BLK_ADDR_REG_OFFSET    0x1f
+#define PLL_AFE1_100MHZ_BLK    0x2100
+#define PLL_CLK_AMP_OFFSET     0x03
+#define PLL_CLK_AMP_2P05V      0x2b18
+
+static int ns2_pci_phy_init(struct phy *p)
+{
+       struct ns2_pci_phy *phy = phy_get_drvdata(p);
+       int rc;
+
+       /* select the AFE 100MHz block page */
+       rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+                          BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK);
+       if (rc)
+               goto err;
+
+       /* set the 100 MHz reference clock amplitude to 2.05 v */
+       rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+                          PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V);
+       if (rc)
+               goto err;
+
+       return 0;
+
+err:
+       dev_err(&phy->mdiodev->dev, "Error %d writing to phy\n", rc);
+       return rc;
+}
+
+static struct phy_ops ns2_pci_phy_ops = {
+       .init = ns2_pci_phy_init,
+};
+
+static int ns2_pci_phy_probe(struct mdio_device *mdiodev)
+{
+       struct device *dev = &mdiodev->dev;
+       struct phy_provider *provider;
+       struct ns2_pci_phy *p;
+       struct phy *phy;
+
+       phy = devm_phy_create(dev, dev->of_node, &ns2_pci_phy_ops);
+       if (IS_ERR(phy)) {
+               dev_err(dev, "failed to create Phy\n");
+               return PTR_ERR(phy);
+       }
+
+       p = devm_kmalloc(dev, sizeof(struct ns2_pci_phy),
+                        GFP_KERNEL);
+       if (!p)
+               return -ENOMEM;
+
+       p->mdiodev = mdiodev;
+       dev_set_drvdata(dev, p);
+
+       p->phy = phy;
+       phy_set_drvdata(phy, p);
+
+       provider = devm_of_phy_provider_register(&phy->dev,
+                                                of_phy_simple_xlate);
+       if (IS_ERR(provider)) {
+               dev_err(dev, "failed to register Phy provider\n");
+               return PTR_ERR(provider);
+       }
+
+       dev_info(dev, "%s PHY registered\n", dev_name(dev));
+
+       return 0;
+}
+
+static const struct of_device_id ns2_pci_phy_of_match[] = {
+       { .compatible = "brcm,ns2-pcie-phy", },
+       { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match);
+
+static struct mdio_driver ns2_pci_phy_driver = {
+       .mdiodrv = {
+               .driver = {
+                       .name = "phy-bcm-ns2-pci",
+                       .of_match_table = ns2_pci_phy_of_match,
+               },
+       },
+       .probe = ns2_pci_phy_probe,
+};
+mdio_module_driver(ns2_pci_phy_driver);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Broadcom Northstar2 PCI Phy driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:phy-bcm-ns2-pci");