[MIPS] Fix RM9000 wait instruction detection.
authorRalf Baechle <ralf@linux-mips.org>
Fri, 2 Jun 2006 10:48:11 +0000 (11:48 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 9 Oct 2006 22:20:45 +0000 (23:20 +0100)
Only revisions < 4.0 don't have a functional wait instruction.

From Thomas Koeller (Thomas.Koeller@baslerweb.com).

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cpu-probe.c

index 9fbf8430c8499972ab80047026c803e64306a253..8485af340ee1a3c0316e8d5a60dc07d9246572d3 100644 (file)
@@ -135,7 +135,6 @@ static inline void check_wait(void)
        case CPU_R5000:
        case CPU_NEVADA:
        case CPU_RM7000:
-       case CPU_RM9000:
        case CPU_4KC:
        case CPU_4KEC:
        case CPU_4KSC:
@@ -164,6 +163,14 @@ static inline void check_wait(void)
                } else
                        printk(" unavailable.\n");
                break;
+       case CPU_RM9000:
+               if ((c->processor_id & 0x00ff) >= 0x40) {
+                       cpu_wait = r4k_wait;
+                       printk(" available.\n");
+               } else {
+                       printk(" unavailable.\n");
+               }
+               break;
        default:
                printk(" unavailable.\n");
                break;