PCI/AER: Use PCI Express Capability accessors

Use PCI Express Capability access functions to simplify PCIe AER.

Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index f7c62453ae002a3bf1bd15941184b2416532c506..c78778fc0cbadd8b651529bd9b0ca63666c5759d 100644 (file)
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -122,19 +122,17 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
 static void aer_enable_rootport(struct aer_rpc *rpc)
 {
        struct pci_dev *pdev = rpc->rpd->port;
-       int pos, aer_pos;
+       int aer_pos;
        u16 reg16;
        u32 reg32;
 
-       pos = pci_pcie_cap(pdev);
        /* Clear PCIe Capability's Device Status */
-       pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
-       pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
+       pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &reg16);
+       pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, reg16);
 
        /* Disable system error generation in response to error messages */
-       pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
-       reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
-       pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
+       pcie_capability_clear_word(pdev, PCI_EXP_RTCTL,
+                                  SYSTEM_ERROR_INTR_ON_MESG_MASK);
 
        aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
        /* Clear error status */
@@ -396,9 +394,8 @@ static void aer_error_resume(struct pci_dev *dev)
        u16 reg16;
 
        /* Clean up Root device status */
-       pos = pci_pcie_cap(dev);
-       pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16);
-       pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
+       pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
+       pcie_capability_write_word(dev, PCI_EXP_DEVSTA, reg16);
 
        /* Clean AER Root Error Status */
        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);

diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index f551534898543dd4cfe88ad384bca34aa37e9f96..cefc0ddcacf63e4c3ddf4b0d72656a98d4784e1a 100644 (file)
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -32,53 +32,28 @@ static bool nosourceid;
 module_param(forceload, bool, 0);
 module_param(nosourceid, bool, 0);
 
+#define        PCI_EXP_AER_FLAGS       (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
+                                PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
+
 int pci_enable_pcie_error_reporting(struct pci_dev *dev)
 {
-       u16 reg16 = 0;
-       int pos;
-
        if (pcie_aer_get_firmware_first(dev))
                return -EIO;
 
-       pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-       if (!pos)
-               return -EIO;
-
-       pos = pci_pcie_cap(dev);
-       if (!pos)
+       if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
                return -EIO;
 
-       pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-       reg16 |= (PCI_EXP_DEVCTL_CERE |
-               PCI_EXP_DEVCTL_NFERE |
-               PCI_EXP_DEVCTL_FERE |
-               PCI_EXP_DEVCTL_URRE);
-       pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-       return 0;
+       return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
 
 int pci_disable_pcie_error_reporting(struct pci_dev *dev)
 {
-       u16 reg16 = 0;
-       int pos;
-
        if (pcie_aer_get_firmware_first(dev))
                return -EIO;
 
-       pos = pci_pcie_cap(dev);
-       if (!pos)
-               return -EIO;
-
-       pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-       reg16 &= ~(PCI_EXP_DEVCTL_CERE |
-               PCI_EXP_DEVCTL_NFERE |
-               PCI_EXP_DEVCTL_FERE |
-               PCI_EXP_DEVCTL_URRE);
-       pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-       return 0;
+       return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
+                                         PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
 
@@ -151,18 +126,12 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
         */
        if (atomic_read(&dev->enable_cnt) == 0)
                return false;
-       pos = pci_pcie_cap(dev);
-       if (!pos)
-               return false;
 
        /* Check if AER is enabled */
-       pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-       if (!(reg16 & (
-               PCI_EXP_DEVCTL_CERE |
-               PCI_EXP_DEVCTL_NFERE |
-               PCI_EXP_DEVCTL_FERE |
-               PCI_EXP_DEVCTL_URRE)))
+       pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
+       if (!(reg16 & PCI_EXP_AER_FLAGS))
                return false;
+
        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
        if (!pos)
                return false;