drm/i915: Sharing the pixel_format_from_vbt to whole i915
authorRamalingam C <ramalingam.c@intel.com>
Thu, 7 Apr 2016 09:06:06 +0000 (14:36 +0530)
committerJani Nikula <jani.nikula@intel.com>
Thu, 7 Apr 2016 13:46:06 +0000 (16:46 +0300)
Shared the function pixel_format_from_vbt for whole display module.
Function declaration is added to intel_dsi.h.

V2: Moved the function to intel_dsi.c and renamed as per the purpose
of the function. Suggested by Jani.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Previously reviewed at https://lists.freedesktop.org/archives/intel-gfx/2016-April/091736.html
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460019967-26501-1-git-send-email-ramalingam.c@intel.com
drivers/gpu/drm/i915/intel_dsi.c
drivers/gpu/drm/i915/intel_dsi.h
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c

index 0de74e1b7ab393ce143b247c5f775d401f577c38..a0f374f0db7cab0e927231deddec136d4b1e752a 100644 (file)
@@ -46,6 +46,24 @@ static const struct {
        },
 };
 
+enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt)
+{
+       /* It just so happens the VBT matches register contents. */
+       switch (fmt) {
+       case VID_MODE_FORMAT_RGB888:
+               return MIPI_DSI_FMT_RGB888;
+       case VID_MODE_FORMAT_RGB666:
+               return MIPI_DSI_FMT_RGB666;
+       case VID_MODE_FORMAT_RGB666_PACKED:
+               return MIPI_DSI_FMT_RGB666_PACKED;
+       case VID_MODE_FORMAT_RGB565:
+               return MIPI_DSI_FMT_RGB565;
+       default:
+               MISSING_CASE(fmt);
+               return MIPI_DSI_FMT_RGB666;
+       }
+}
+
 static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
 {
        struct drm_encoder *encoder = &intel_dsi->base.base;
index ec58ead9ccd1a956bb5c3614635954d9452f3c92..dabde19ee8aad0a4c0cb0044670e83d172a51bbe 100644 (file)
@@ -134,5 +134,6 @@ extern void intel_dsi_reset_clocks(struct intel_encoder *encoder,
                                                        enum port port);
 
 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
+enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 
 #endif /* _INTEL_DSI_H */
index 9cfc62765f6e56a02b1169d0f20fd4bb94ca2946..e498f1c3221e368a5d2d53b20c609b7633baa744 100644 (file)
@@ -423,25 +423,6 @@ static const struct drm_panel_funcs vbt_panel_funcs = {
        .get_modes = vbt_panel_get_modes,
 };
 
-/* XXX: This should be done when parsing the VBT in intel_bios.c */
-static enum mipi_dsi_pixel_format pixel_format_from_vbt(u32 fmt)
-{
-       /* It just so happens the VBT matches register contents. */
-       switch (fmt) {
-       case VID_MODE_FORMAT_RGB888:
-               return MIPI_DSI_FMT_RGB888;
-       case VID_MODE_FORMAT_RGB666:
-               return MIPI_DSI_FMT_RGB666;
-       case VID_MODE_FORMAT_RGB666_PACKED:
-               return MIPI_DSI_FMT_RGB666_PACKED;
-       case VID_MODE_FORMAT_RGB565:
-               return MIPI_DSI_FMT_RGB565;
-       default:
-               MISSING_CASE(fmt);
-               return MIPI_DSI_FMT_RGB666;
-       }
-}
-
 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
 {
        struct drm_device *dev = intel_dsi->base.base.dev;
@@ -466,7 +447,9 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
        intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1;
        intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;
        intel_dsi->lane_count = mipi_config->lane_cnt + 1;
-       intel_dsi->pixel_format = pixel_format_from_vbt(mipi_config->videomode_color_format << 7);
+       intel_dsi->pixel_format =
+                       pixel_format_from_register_bits(
+                               mipi_config->videomode_color_format << 7);
        bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
 
        intel_dsi->dual_link = mipi_config->dual_link;