ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver

Drop the operating-points table present in am33xx.dtsi and add an
operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance
value and provide voltages for each OPP using the <target min max>
format instead.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 2661accdcd9212b7dd177895ccc95d4bb14a14a5..2625414b805aa26d7cbe7b6b7662a162a19266a2 100644 (file)
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -45,19 +45,9 @@
                        device_type = "cpu";
                        reg = <0>;
 
-                       /*
-                        * To consider voltage drop between PMIC and SoC,
-                        * tolerance value is reduced to 2% from 4% and
-                        * voltage value is increased as a precaution.
-                        */
-                       operating-points = <
-                               /* kHz    uV */
-                               720000  1285000
-                               600000  1225000
-                               500000  1125000
-                               275000  1125000
-                       >;
-                       voltage-tolerance = <2>; /* 2 percentage */
+                       operating-points-v2 = <&cpu0_opp_table>;
+                       ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
+                       ti,syscon-rev = <&scm_conf 0x600>;
 
                        clocks = <&dpll_mpu_ck>;
                        clock-names = "cpu";
@@ -66,6 +56,78 @@
                };
        };
 
+       cpu0_opp_table: opp_table0 {
+               compatible = "operating-points-v2";
+
+               /*
+                * The three following nodes are marked with opp-suspend
+                * because the can not be enabled simultaneously on a
+                * single SoC.
+                */
+               opp50@300000000 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <950000 931000 969000>;
+                       opp-supported-hw = <0x06 0x0010>;
+                       opp-suspend;
+               };
+
+               opp100@275000000 {
+                       opp-hz = /bits/ 64 <275000000>;
+                       opp-microvolt = <1100000 1078000 1122000>;
+                       opp-supported-hw = <0x01 0x00FF>;
+                       opp-suspend;
+               };
+
+               opp100@300000000 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <1100000 1078000 1122000>;
+                       opp-supported-hw = <0x06 0x0020>;
+                       opp-suspend;
+               };
+
+               opp100@500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <1100000 1078000 1122000>;
+                       opp-supported-hw = <0x01 0xFFFF>;
+               };
+
+               opp100@600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <1100000 1078000 1122000>;
+                       opp-supported-hw = <0x06 0x0040>;
+               };
+
+               opp120@600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <1200000 1176000 1224000>;
+                       opp-supported-hw = <0x01 0xFFFF>;
+               };
+
+               opp120@720000000 {
+                       opp-hz = /bits/ 64 <720000000>;
+                       opp-microvolt = <1200000 1176000 1224000>;
+                       opp-supported-hw = <0x06 0x0080>;
+               };
+
+               oppturbo@720000000 {
+                       opp-hz = /bits/ 64 <720000000>;
+                       opp-microvolt = <1260000 1234800 1285200>;
+                       opp-supported-hw = <0x01 0xFFFF>;
+               };
+
+               oppturbo@800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1260000 1234800 1285200>;
+                       opp-supported-hw = <0x06 0x0100>;
+               };
+
+               oppnitro@1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <1325000 1298500 1351500>;
+                       opp-supported-hw = <0x04 0x0200>;
+               };
+       };
+
        pmu {
                compatible = "arm,cortex-a8-pmu";
                interrupts = <3>;