drm/i915: Only check for valid PP_{ON, OFF}_DELAYS on pre ILK hardware

ILK+ have this register on the PCH. This check was triggering unclaimed
writes.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 0ed6baff4b0c2146d133006c52542b48076c5cc4..87e9b92039df0cfbbcf960d4e0001270101bb774 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -762,7 +762,8 @@ void intel_setup_bios(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
 
         /* Set the Panel Power On/Off timings if uninitialized. */
-       if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
+       if (!HAS_PCH_SPLIT(dev) &&
+           I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
                /* Set T2 to 40ms and T5 to 200ms */
                I915_WRITE(PP_ON_DELAYS, 0x019007d0);