drm/amdgpu: Use gpu scheduler for gfx ring ib test

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 54a2bf8d4e8d29cbcdb141679fd4b040094ce7be..5fc104bd9c027ec70ef8604722daa7fcdb2e4e72 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2662,26 +2662,22 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
        r = amdgpu_ib_get(ring, NULL, 256, &ib);
        if (r) {
                DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
-               return r;
+               goto err1;
        }
        ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
        ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START));
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
-       r = amdgpu_ib_schedule(adev, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED);
-       if (r) {
-               amdgpu_gfx_scratch_free(adev, scratch);
-               amdgpu_ib_free(adev, &ib);
-               DRM_ERROR("amdgpu: failed to schedule ib (%d).\n", r);
-               return r;
-       }
+
+       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
+                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+       if (r)
+               goto err2;
+
        r = amdgpu_fence_wait(ib.fence, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
-               amdgpu_ib_free(adev, &ib);
-               return r;
+               goto err2;
        }
        for (i = 0; i < adev->usec_timeout; i++) {
                tmp = RREG32(scratch);
@@ -2691,14 +2687,18 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
        }
        if (i < adev->usec_timeout) {
                DRM_INFO("ib test on ring %d succeeded in %u usecs\n",
-                        ib.fence->ring->idx, i);
+                        ring->idx, i);
+               goto err2;
        } else {
                DRM_ERROR("amdgpu: ib test failed (scratch(0x%04X)=0x%08X)\n",
                          scratch, tmp);
                r = -EINVAL;
        }
-       amdgpu_gfx_scratch_free(adev, scratch);
+
+err2:
        amdgpu_ib_free(adev, &ib);
+err1:
+       amdgpu_gfx_scratch_free(adev, scratch);
        return r;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b9381fb366698e193fc768260437653a4b6c7b7c..81fa592cc77a0b2a6147f6e19989fa1880fadfae 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -624,26 +624,22 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
        r = amdgpu_ib_get(ring, NULL, 256, &ib);
        if (r) {
                DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
-               return r;
+               goto err1;
        }
        ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
        ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START));
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
-       r = amdgpu_ib_schedule(adev, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED);
-       if (r) {
-               amdgpu_gfx_scratch_free(adev, scratch);
-               amdgpu_ib_free(adev, &ib);
-               DRM_ERROR("amdgpu: failed to schedule ib (%d).\n", r);
-               return r;
-       }
+
+       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
+                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+       if (r)
+               goto err2;
+
        r = amdgpu_fence_wait(ib.fence, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
-               amdgpu_ib_free(adev, &ib);
-               return r;
+               goto err2;
        }
        for (i = 0; i < adev->usec_timeout; i++) {
                tmp = RREG32(scratch);
@@ -653,14 +649,17 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
        }
        if (i < adev->usec_timeout) {
                DRM_INFO("ib test on ring %d succeeded in %u usecs\n",
-                        ib.fence->ring->idx, i);
+                        ring->idx, i);
+               goto err2;
        } else {
                DRM_ERROR("amdgpu: ib test failed (scratch(0x%04X)=0x%08X)\n",
                          scratch, tmp);
                r = -EINVAL;
        }
-       amdgpu_gfx_scratch_free(adev, scratch);
+err2:
        amdgpu_ib_free(adev, &ib);
+err1:
+       amdgpu_gfx_scratch_free(adev, scratch);
        return r;
 }