[media] cx18: support big-endian systems

base_addr has type resource_size_t, which may be 64 bits.

Also fix a few endian issues related to mailboxes and firmware loading.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

diff --git a/drivers/media/video/cx18/cx18-driver.c b/drivers/media/video/cx18/cx18-driver.c
index b55d57cc1a1c24972fad9e56f3eea804dccab535..7e5ffd6f51786d3390b629b8794b4139aa410551 100644 (file)
--- a/drivers/media/video/cx18/cx18-driver.c
+++ b/drivers/media/video/cx18/cx18-driver.c
@@ -838,10 +838,10 @@ static int cx18_setup_pci(struct cx18 *cx, struct pci_dev *pci_dev,
        }
 
        CX18_DEBUG_INFO("cx%d (rev %d) at %02x:%02x.%x, "
-                  "irq: %d, latency: %d, memory: 0x%lx\n",
+                  "irq: %d, latency: %d, memory: 0x%llx\n",
                   cx->pci_dev->device, cx->card_rev, pci_dev->bus->number,
                   PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn),
-                  cx->pci_dev->irq, pci_latency, (unsigned long)cx->base_addr);
+                  cx->pci_dev->irq, pci_latency, (u64)cx->base_addr);
 
        return 0;
 }
@@ -938,7 +938,7 @@ static int __devinit cx18_probe(struct pci_dev *pci_dev,
        if (retval)
                goto err;
 
-       CX18_DEBUG_INFO("base addr: 0x%08x\n", cx->base_addr);
+       CX18_DEBUG_INFO("base addr: 0x%llx\n", (u64)cx->base_addr);
 
        /* PCI Device Setup */
        retval = cx18_setup_pci(cx, pci_dev, pci_id);
@@ -946,8 +946,8 @@ static int __devinit cx18_probe(struct pci_dev *pci_dev,
                goto free_workqueues;
 
        /* map io memory */
-       CX18_DEBUG_INFO("attempting ioremap at 0x%08x len 0x%08x\n",
-                  cx->base_addr + CX18_MEM_OFFSET, CX18_MEM_SIZE);
+       CX18_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n",
+                  (u64)cx->base_addr + CX18_MEM_OFFSET, CX18_MEM_SIZE);
        cx->enc_mem = ioremap_nocache(cx->base_addr + CX18_MEM_OFFSET,
                                       CX18_MEM_SIZE);
        if (!cx->enc_mem) {

diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h
index 7a37e0ee136f095aa8cfb8c696811aa2165efe46..2767c64df0c87f9c044aca755a63fbfd0c75adf3 100644 (file)
--- a/drivers/media/video/cx18/cx18-driver.h
+++ b/drivers/media/video/cx18/cx18-driver.h
@@ -622,7 +622,7 @@ struct cx18 {
                                   unique ID. Starts at 1, so 0 can be used as
                                   uninitialized value in the stream->id. */
 
-       u32 base_addr;
+       resource_size_t base_addr;
 
        u8 card_rev;
        void __iomem *enc_mem, *reg_mem;

diff --git a/drivers/media/video/cx18/cx18-firmware.c b/drivers/media/video/cx18/cx18-firmware.c
index 1b3fb502e6be5fdb31164407a72f8de96fa9712a..b85c292a849ac2debe36c828e506254cd65214a7 100644 (file)
--- a/drivers/media/video/cx18/cx18-firmware.c
+++ b/drivers/media/video/cx18/cx18-firmware.c
@@ -164,8 +164,13 @@ static int load_apu_fw_direct(const char *fn, u8 __iomem *dst, struct cx18 *cx,
 
        apu_version = (vers[0] << 24) | (vers[4] << 16) | vers[32];
        while (offset + sizeof(seghdr) < fw->size) {
-               /* TODO: byteswapping */
-               memcpy(&seghdr, src + offset / 4, sizeof(seghdr));
+               const u32 *shptr = src + offset / 4;
+
+               seghdr.sync1 = le32_to_cpu(shptr[0]);
+               seghdr.sync2 = le32_to_cpu(shptr[1]);
+               seghdr.addr = le32_to_cpu(shptr[2]);
+               seghdr.size = le32_to_cpu(shptr[3]);
+
                offset += sizeof(seghdr);
                if (seghdr.sync1 != APU_ROM_SYNC1 ||
                    seghdr.sync2 != APU_ROM_SYNC2) {

diff --git a/drivers/media/video/cx18/cx18-mailbox.c b/drivers/media/video/cx18/cx18-mailbox.c
index ed8118390b02ab9fd3ec38bd53d549053c2d5616..eabf00c6351b82365494d27bbac6ffd7c8a83c29 100644 (file)
--- a/drivers/media/video/cx18/cx18-mailbox.c
+++ b/drivers/media/video/cx18/cx18-mailbox.c
@@ -434,6 +434,7 @@ static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)
 {
        u32 handle, mdl_ack_offset, mdl_ack_count;
        struct cx18_mailbox *mb;
+       int i;
 
        mb = &order->mb;
        handle = mb->args[0];
@@ -447,8 +448,9 @@ static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)
                return -1;
        }
 
-       cx18_memcpy_fromio(cx, order->mdl_ack, cx->enc_mem + mdl_ack_offset,
-                          sizeof(struct cx18_mdl_ack) * mdl_ack_count);
+       for (i = 0; i < sizeof(struct cx18_mdl_ack) * mdl_ack_count; i += sizeof(u32))
+               ((u32 *)order->mdl_ack)[i / sizeof(u32)] =
+                       cx18_readl(cx, cx->enc_mem + mdl_ack_offset + i);
 
        if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
                mb_ack_irq(cx, order);
@@ -538,6 +540,7 @@ void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
        struct cx18_mailbox *order_mb;
        struct cx18_in_work_order *order;
        int submit;
+       int i;
 
        switch (rpu) {
        case CPU:
@@ -562,10 +565,12 @@ void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
        order_mb = &order->mb;
 
        /* mb->cmd and mb->args[0] through mb->args[2] */
-       cx18_memcpy_fromio(cx, &order_mb->cmd, &mb->cmd, 4 * sizeof(u32));
+       for (i = 0; i < 4; i++)
+               (&order_mb->cmd)[i] = cx18_readl(cx, &mb->cmd + i);
+
        /* mb->request and mb->ack.  N.B. we want to read mb->ack last */
-       cx18_memcpy_fromio(cx, &order_mb->request, &mb->request,
-                          2 * sizeof(u32));
+       for (i = 0; i < 2; i++)
+               (&order_mb->request)[i] = cx18_readl(cx, &mb->request + i);
 
        if (order_mb->request == order_mb->ack) {
                CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our "