MIPS: Kconfig: Enable common clock framework for Malta and SEAD3
authorGuenter Roeck <linux@roeck-us.net>
Sat, 22 Aug 2015 09:40:41 +0000 (02:40 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 3 Sep 2015 10:08:06 +0000 (12:08 +0200)
Now that we're ready to enable COMMON_CLK for GIC platforms do so for
Malta and SEAD3.  The only other user of the GIC Pistachio does already
do so.

[ralf@linux-mips.org: Rewrite the commit message because applied in the
right order there is no breakage thus no fix required.]

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11038/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig

index 7a9a2554fa002455a89daecee2a3069ab4cc2fb2..8083ef9c80d4996f6da3e5d775312b8b4def6a6d 100644 (file)
@@ -409,6 +409,7 @@ config MIPS_MALTA
        select CEVT_R4K
        select CSRC_R4K
        select CLKSRC_MIPS_GIC
+       select COMMON_CLK
        select DMA_MAYBE_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_PCSPKR_PLATFORM
@@ -459,6 +460,7 @@ config MIPS_SEAD3
        select CEVT_R4K
        select CSRC_R4K
        select CLKSRC_MIPS_GIC
+       select COMMON_CLK
        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_IRQ_EI
        select DMA_NONCOHERENT