ASoC: imx-mc13783: Add audmux settings for mx27pdk

mx27pdk board also has a mc13783 codec.

Add support for it and do a run-time machine type check to perform the correct
audiomux settings.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

diff --git a/sound/soc/fsl/imx-mc13783.c b/sound/soc/fsl/imx-mc13783.c
index f59c34943662c8e11a4c51b3d99984b8ac1ebae4..549b31fdc9dd4eabf268db09c5318e047e1a9646 100644 (file)
--- a/sound/soc/fsl/imx-mc13783.c
+++ b/sound/soc/fsl/imx-mc13783.c
@@ -111,22 +111,39 @@ static int __devinit imx_mc13783_probe(struct platform_device *pdev)
                return ret;
        }
 
-       imx_audmux_v2_configure_port(MX31_AUDMUX_PORT4_SSI_PINS_4,
-               IMX_AUDMUX_V2_PTCR_SYN,
-               IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0) |
-               IMX_AUDMUX_V2_PDCR_MODE(1) |
-               IMX_AUDMUX_V2_PDCR_INMMASK(0xfc));
-       imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0,
-               IMX_AUDMUX_V2_PTCR_SYN |
-               IMX_AUDMUX_V2_PTCR_TFSDIR |
-               IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
-               IMX_AUDMUX_V2_PTCR_TCLKDIR |
-               IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
-               IMX_AUDMUX_V2_PTCR_RFSDIR |
-               IMX_AUDMUX_V2_PTCR_RFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
-               IMX_AUDMUX_V2_PTCR_RCLKDIR |
-               IMX_AUDMUX_V2_PTCR_RCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4),
-               IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT4_SSI_PINS_4));
+       if (machine_is_mx31_3ds()) {
+               imx_audmux_v2_configure_port(MX31_AUDMUX_PORT4_SSI_PINS_4,
+                       IMX_AUDMUX_V2_PTCR_SYN,
+                       IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0) |
+                       IMX_AUDMUX_V2_PDCR_MODE(1) |
+                       IMX_AUDMUX_V2_PDCR_INMMASK(0xfc));
+               imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0,
+                       IMX_AUDMUX_V2_PTCR_SYN |
+                       IMX_AUDMUX_V2_PTCR_TFSDIR |
+                       IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
+                       IMX_AUDMUX_V2_PTCR_TCLKDIR |
+                       IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
+                       IMX_AUDMUX_V2_PTCR_RFSDIR |
+                       IMX_AUDMUX_V2_PTCR_RFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
+                       IMX_AUDMUX_V2_PTCR_RCLKDIR |
+                       IMX_AUDMUX_V2_PTCR_RCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4),
+                       IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT4_SSI_PINS_4));
+       } else if (machine_is_mx27_3ds()) {
+               imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
+                       IMX_AUDMUX_V1_PCR_SYN |
+                       IMX_AUDMUX_V1_PCR_TFSDIR |
+                       IMX_AUDMUX_V1_PCR_TCLKDIR |
+                       IMX_AUDMUX_V1_PCR_RFSDIR |
+                       IMX_AUDMUX_V1_PCR_RCLKDIR |
+                       IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
+                       IMX_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
+                       IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
+               );
+               imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
+                       IMX_AUDMUX_V1_PCR_SYN |
+                       IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
+               );
+       }
 
        return ret;
 }