mcu_dat[id].dmask);
}
#else
-static int mcu_ipc_set_affinity(enum mcu_ipc_region id, struct device *dev, int irq)
+int mcu_ipc_set_affinity(enum mcu_ipc_region id, int affinity)
{
+ if (id >= MCU_MAX) {
+ pr_err("mcu_ipc_set_affinity err. id=%d\n", id);
+ return -1;
+ }
+
+ irq_set_affinity(mcu_dat[id].irq, cpumask_of(affinity));
+
return 0;
}
+EXPORT_SYMBOL(mcu_ipc_set_affinity);
#endif
#ifdef CONFIG_MCU_IPC_TEST
int mcu_ipc_irq;
int err = 0;
u32 id = 0;
- struct cpumask cpumaks_mcu_ipc;
- int ret;
dev_err(&pdev->dev, "%s: mcu_ipc probe start.\n", __func__);
dev_err(&pdev->dev, "Can't request MCU_IPC IRQ\n");
return err;
}
-
- /* Set CPU affinity for mcu_ipc */
- cpumask_clear(&cpumaks_mcu_ipc);
- cpumask_set_cpu(MCU_IPC_AFFINITY_CORE, &cpumaks_mcu_ipc);
- ret = irq_set_affinity_hint(mcu_ipc_irq, &cpumaks_mcu_ipc);
- if (ret)
- dev_err(dev, "irq_set_affinity_hit error: %d\n", ret);
- else
- dev_info(dev, "irq_set_affinity_hint - CPU core: %d\n",
- MCU_IPC_AFFINITY_CORE);
+ mcu_dat[id].irq = mcu_ipc_irq;
mcu_ipc_clear_all_interrupt(id);
- /* set argos irq affinity */
- err = mcu_ipc_set_affinity(id, dev, mcu_ipc_irq);
- if (err)
- dev_err(dev, "Can't set IRQ affinity with(%d)\n", err);
-
#ifdef CONFIG_MCU_IPC_TEST
test_without_dev(id);
#endif
msg_handler(shmd, mst);
- queue_delayed_work_on(3, system_long_wq, &shmd->msg_rx_dwork, 0);
+ queue_delayed_work(system_long_wq, &shmd->msg_rx_dwork, 0);
}
}
INT_MAX);
pm_qos_update_request(&pm_qos_req_int,
INT_MAX);
+
+ mcu_ipc_set_affinity(MCU_CP, 4);
}
static void shmem_qos_work_normal(struct work_struct *work)
u32 mbox_extract_value(enum mcu_ipc_region id, u32 mbx_num, u32 mask, u32 pos);
void mbox_sw_reset(enum mcu_ipc_region id);
void mcu_ipc_clear_all_interrupt(enum mcu_ipc_region id);
+int mcu_ipc_set_affinity(enum mcu_ipc_region id, int affinity);
#endif