[MIPS] add DECstation I/O ASIC clocksource
authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Thu, 24 Apr 2008 00:48:40 +0000 (09:48 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 28 Apr 2008 16:14:32 +0000 (17:14 +0100)
Add DECstation I/O ASIC clocksource

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig
arch/mips/dec/time.c
arch/mips/kernel/Makefile
arch/mips/kernel/csrc-ioasic.c [new file with mode: 0644]
include/asm-mips/dec/ioasic.h

index 77e3d2402454c13776c7cc1982d7b51ce8968997..2e4ac657a4c3e2064678538e214ca14580a40a85 100644 (file)
@@ -82,6 +82,7 @@ config MACH_DECSTATION
        bool "DECstations"
        select BOOT_ELF32
        select CEVT_R4K
+       select CSRC_IOASIC
        select CSRC_R4K
        select CPU_DADDI_WORKAROUNDS if 64BIT
        select CPU_R4000_WORKAROUNDS if 64BIT
@@ -784,6 +785,9 @@ config CEVT_TXX9
 config CSRC_BCM1480
        bool
 
+config CSRC_IOASIC
+       bool
+
 config CSRC_R4K
        bool
 
index 60349062595a9f5c0d420a75bab4faf3a9ace8d8..0cbab8d0052bf3209e7c2ab453b2f5f0a7427ef4 100644 (file)
@@ -165,7 +165,7 @@ void __init plat_time_init(void)
 
        if (!cpu_has_counter && IOASIC)
                /* For pre-R4k systems we use the I/O ASIC's counter.  */
-               clocksource_mips.read = dec_ioasic_hpt_read;
+               dec_ioasic_clocksource_init();
 
        /* Set up the rate of periodic DS1287 interrupts.  */
        CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
index 87067e8fee9eac093c8a922fc530913eebe541b9..00ac35e501b367e47baccebd91d9d972791dff8a 100644 (file)
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX)    += cevt-gt641xx.o
 obj-$(CONFIG_CEVT_SB1250)      += cevt-sb1250.o
 obj-$(CONFIG_CEVT_TXX9)                += cevt-txx9.o
 obj-$(CONFIG_CSRC_BCM1480)     += csrc-bcm1480.o
+obj-$(CONFIG_CSRC_IOASIC)      += csrc-ioasic.o
 obj-$(CONFIG_CSRC_R4K)         += csrc-r4k.o
 obj-$(CONFIG_CSRC_SB1250)      += csrc-sb1250.o
 obj-$(CONFIG_SYNC_R4K)         += sync-r4k.o
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
new file mode 100644 (file)
index 0000000..1d5f63c
--- /dev/null
@@ -0,0 +1,65 @@
+/*
+ *  DEC I/O ASIC's counter clocksource
+ *
+ *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/clocksource.h>
+#include <linux/init.h>
+
+#include <asm/ds1287.h>
+#include <asm/time.h>
+#include <asm/dec/ioasic.h>
+#include <asm/dec/ioasic_addrs.h>
+
+static cycle_t dec_ioasic_hpt_read(void)
+{
+       return ioasic_read(IO_REG_FCTR);
+}
+
+static struct clocksource clocksource_dec = {
+       .name           = "dec-ioasic",
+       .read           = dec_ioasic_hpt_read,
+       .mask           = CLOCKSOURCE_MASK(32),
+       .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+void __init dec_ioasic_clocksource_init(void)
+{
+       unsigned int freq;
+       u32 start, end;
+       int i = HZ / 10;
+
+
+       while (!ds1287_timer_state())
+               ;
+
+       start = dec_ioasic_hpt_read();
+
+       while (i--)
+               while (!ds1287_timer_state())
+                       ;
+
+       end = dec_ioasic_hpt_read();
+
+       freq = (end - start) * 10;
+       printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
+
+       clocksource_dec.rating = 200 + freq / 10000000;
+       clocksource_set_clock(&clocksource_dec, freq);
+
+       clocksource_register(&clocksource_dec);
+}
index 486a5b0a1302b1aa9f7ee1214b16aa894259c6ba..98badd6bf22dd6ca386a62d1df19f9d0c8759874 100644 (file)
@@ -33,4 +33,6 @@ static inline u32 ioasic_read(unsigned int reg)
 
 extern void init_ioasic_irqs(int base);
 
+extern void dec_ioasic_clocksource_init(void);
+
 #endif /* __ASM_DEC_IOASIC_H */