Merge branch 'samsung/cleanup' into next/boards
authorArnd Bergmann <arnd@arndb.de>
Mon, 9 Jan 2012 17:06:36 +0000 (17:06 +0000)
committerArnd Bergmann <arnd@arndb.de>
Mon, 9 Jan 2012 17:06:36 +0000 (17:06 +0000)
Conflicts:
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-omap2/board-ti8168evm.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/common.c

Lots of relatively simple conflicts between the board
changes and stuff from the arm tree. This pulls in
the resolution from the samsung/cleanup tree, so we
don't get conflicting merges.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
23 files changed:
1  2 
arch/arm/configs/imx_v4_v5_defconfig
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/mach-apf9328.c
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-imx/mach-mx31_3ds.c
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-cm-t35.c
arch/arm/mach-omap2/board-ti8168evm.c
arch/arm/mach-omap2/common.h
arch/arm/mach-pxa/mioa701.c
arch/arm/mach-s3c2440/mach-mini2440.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-s3c64xx/mach-crag6410.c
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-harmony.c
arch/arm/mach-tegra/board-paz00.c
arch/arm/mach-tegra/board-seaboard.c
arch/arm/mach-tegra/board-trimslice.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/irq.c
arch/arm/mach-tegra/timer.c
arch/arm/plat-samsung/Kconfig

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index bee633496f7be731bb356bffbba27ebbc4479908,05b49bb5d677d2a64501276d5ab76a5c586362ea..c25728106917be3bdec5c8a5e687adc83e84a1ca
  #include <linux/irq.h>
  #include <linux/irqdomain.h>
  #include <linux/of.h>
+ #include <linux/of_address.h>
  #include <linux/of_irq.h>
  #include <linux/of_platform.h>
 +#include <linux/phy.h>
 +#include <linux/micrel_phy.h>
  #include <asm/hardware/cache-l2x0.h>
  #include <asm/hardware/gic.h>
  #include <asm/mach/arch.h>
  #include <mach/common.h>
  #include <mach/hardware.h>
  
+ void imx6q_restart(char mode, const char *cmd)
+ {
+       struct device_node *np;
+       void __iomem *wdog_base;
+       np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
+       wdog_base = of_iomap(np, 0);
+       if (!wdog_base)
+               goto soft;
+       imx_src_prepare_restart();
+       /* enable wdog */
+       writew_relaxed(1 << 2, wdog_base);
+       /* write twice to ensure the request will not get ignored */
+       writew_relaxed(1 << 2, wdog_base);
+       /* wait for reset to assert ... */
+       mdelay(500);
+       pr_err("Watchdog reset failed to assert reset\n");
+       /* delay to allow the serial port to show the message */
+       mdelay(50);
+ soft:
+       /* we'll take a jump through zero as a poor second */
+       soft_restart(0);
+ }
 +/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
 +static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 +{
 +      /* min rx data delay */
 +      phy_write(phydev, 0x0b, 0x8105);
 +      phy_write(phydev, 0x0c, 0x0000);
 +
 +      /* max rx/tx clock delay, min rx/tx control delay */
 +      phy_write(phydev, 0x0b, 0x8104);
 +      phy_write(phydev, 0x0c, 0xf0f0);
 +      phy_write(phydev, 0x0b, 0x104);
 +
 +      return 0;
 +}
 +
  static void __init imx6q_init_machine(void)
  {
 +      if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
 +              phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 +                                         ksz9021rn_phy_fixup);
 +
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  
        imx6q_pm_init();
Simple merge
Simple merge
Simple merge
Simple merge
index 5b6ad6e3ccb4989b72b2d14b387296e08e6d6707,74713e3993e5f4b8d43bc3d20adf84a88d1944b8..ab9a7a9e9d643a8d7cb347d048ea43eb2dd1df5e
@@@ -47,19 -43,10 +47,21 @@@ static void __init ti81xx_evm_init(void
  MACHINE_START(TI8168EVM, "ti8168evm")
        /* Maintainer: Texas Instruments */
        .atag_offset    = 0x100,
 -      .map_io         = ti8168_evm_map_io,
 -      .init_early     = ti816x_init_early,
 -      .init_irq       = ti816x_init_irq,
 +      .map_io         = ti81xx_map_io,
 +      .init_early     = ti81xx_init_early,
 +      .init_irq       = ti81xx_init_irq,
 +      .timer          = &omap3_timer,
 +      .init_machine   = ti81xx_evm_init,
++      .restart        = omap_prcm_restart,
 +MACHINE_END
 +
 +MACHINE_START(TI8148EVM, "ti8148evm")
 +      /* Maintainer: Texas Instruments */
 +      .atag_offset    = 0x100,
 +      .map_io         = ti81xx_map_io,
 +      .init_early     = ti81xx_init_early,
 +      .init_irq       = ti81xx_init_irq,
        .timer          = &omap3_timer,
 -      .init_machine   = ti8168_evm_init,
 +      .init_machine   = ti81xx_evm_init,
+       .restart        = omap_prcm_restart,
  MACHINE_END
index 4b2b416fafe18e57119d6d61a89aff397eb8a6e9,cda888a2e635189f5321218239193b8de6bb5001..9403b2ce6c85e9b9dd969a811f1122eb62ec15d1
@@@ -90,8 -82,9 +90,9 @@@ void omap35xx_init_early(void)
  void omap3630_init_early(void);
  void omap3_init_early(void);  /* Do not use this one */
  void am35xx_init_early(void);
 -void ti816x_init_early(void);
 +void ti81xx_init_early(void);
  void omap4430_init_early(void);
+ void omap_prcm_restart(char, const char *);
  
  /*
   * IO bases for various OMAP processors
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Simple merge
index 4d8c489edc04805f338b88c97059b175cd1cf73b,90b34ab75b533aef090bcd29b9a2ec4719886610..e9dae9105df65ca1febf8007ed1394921f424671
@@@ -286,8 -292,8 +292,8 @@@ config MACH_WLF_CRAGG_641
        select S3C_DEV_I2C1
        select S3C_DEV_WDT
        select S3C_DEV_RTC
-       select S3C64XX_DEV_SPI
+       select S3C64XX_DEV_SPI0
 -      select S3C24XX_GPIO_EXTRA128
 +      select SAMSUNG_GPIO_EXTRA128
        select I2C
        help
          Machine support for the Wolfson Cragganmore S3C6410 variant.
Simple merge
index 70f060251f00d677e323325e1d13ae15cb3f7106,0000000000000000000000000000000000000000..c2ff8e020105e6a104308d258dc6a4f1b4f59bdc
mode 100644,000000..100644
--- /dev/null
@@@ -1,150 -1,0 +1,151 @@@
 +/*
 + * nVidia Tegra device tree board support
 + *
 + * Copyright (C) 2010 Secret Lab Technologies, Ltd.
 + * Copyright (C) 2010 Google, Inc.
 + *
 + * This software is licensed under the terms of the GNU General Public
 + * License version 2, as published by the Free Software Foundation, and
 + * may be copied, distributed, and modified under those terms.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + */
 +
 +#include <linux/kernel.h>
 +#include <linux/init.h>
 +#include <linux/platform_device.h>
 +#include <linux/serial_8250.h>
 +#include <linux/clk.h>
 +#include <linux/dma-mapping.h>
 +#include <linux/irqdomain.h>
 +#include <linux/of.h>
 +#include <linux/of_address.h>
 +#include <linux/of_fdt.h>
 +#include <linux/of_irq.h>
 +#include <linux/of_platform.h>
 +#include <linux/pda_power.h>
 +#include <linux/io.h>
 +#include <linux/i2c.h>
 +#include <linux/i2c-tegra.h>
 +
 +#include <asm/hardware/gic.h>
 +#include <asm/mach-types.h>
 +#include <asm/mach/arch.h>
 +#include <asm/mach/time.h>
 +#include <asm/setup.h>
 +#include <asm/hardware/gic.h>
 +
 +#include <mach/iomap.h>
 +#include <mach/irqs.h>
 +
 +#include "board.h"
 +#include "board-harmony.h"
 +#include "clock.h"
 +#include "devices.h"
 +
 +void harmony_pinmux_init(void);
 +void paz00_pinmux_init(void);
 +void seaboard_pinmux_init(void);
 +void trimslice_pinmux_init(void);
 +void ventana_pinmux_init(void);
 +
 +struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
 +      OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
 +      OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
 +                     &tegra_ehci1_device.dev.platform_data),
 +      OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
 +                     &tegra_ehci2_device.dev.platform_data),
 +      OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
 +                     &tegra_ehci3_device.dev.platform_data),
 +      {}
 +};
 +
 +static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
 +      /* name         parent          rate            enabled */
 +      { "uartd",      "pll_p",        216000000,      true },
 +      { "usbd",       "clk_m",        12000000,       false },
 +      { "usb2",       "clk_m",        12000000,       false },
 +      { "usb3",       "clk_m",        12000000,       false },
 +      { "pll_a",      "pll_p_out1",   56448000,       true },
 +      { "pll_a_out0", "pll_a",        11289600,       true },
 +      { "cdev1",      NULL,           0,              true },
 +      { "i2s1",       "pll_a_out0",   11289600,       false},
 +      { "i2s2",       "pll_a_out0",   11289600,       false},
 +      { NULL,         NULL,           0,              0},
 +};
 +
 +static struct of_device_id tegra_dt_match_table[] __initdata = {
 +      { .compatible = "simple-bus", },
 +      {}
 +};
 +
 +static struct {
 +      char *machine;
 +      void (*init)(void);
 +} pinmux_configs[] = {
 +      { "compulab,trimslice", trimslice_pinmux_init },
 +      { "nvidia,harmony", harmony_pinmux_init },
 +      { "compal,paz00", paz00_pinmux_init },
 +      { "nvidia,seaboard", seaboard_pinmux_init },
 +      { "nvidia,ventana", ventana_pinmux_init },
 +};
 +
 +static void __init tegra_dt_init(void)
 +{
 +      int i;
 +
 +      tegra_clk_init_from_table(tegra_dt_clk_init_table);
 +
 +      for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
 +              if (of_machine_is_compatible(pinmux_configs[i].machine)) {
 +                      pinmux_configs[i].init();
 +                      break;
 +              }
 +      }
 +
 +      WARN(i == ARRAY_SIZE(pinmux_configs),
 +              "Unknown platform! Pinmuxing not initialized\n");
 +
 +      /*
 +       * Finished with the static registrations now; fill in the missing
 +       * devices
 +       */
 +      of_platform_populate(NULL, tegra_dt_match_table,
 +                              tegra20_auxdata_lookup, NULL);
 +}
 +
 +static const char *tegra20_dt_board_compat[] = {
 +      "compulab,trimslice",
 +      "nvidia,harmony",
 +      "compal,paz00",
 +      "nvidia,seaboard",
 +      "nvidia,ventana",
 +      NULL
 +};
 +
 +DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
 +      .map_io         = tegra_map_common_io,
 +      .init_early     = tegra20_init_early,
 +      .init_irq       = tegra_dt_init_irq,
 +      .handle_irq     = gic_handle_irq,
 +      .timer          = &tegra_timer,
 +      .init_machine   = tegra_dt_init,
++      .restart        = tegra_assert_system_reset,
 +      .dt_compat      = tegra20_dt_board_compat,
 +MACHINE_END
Simple merge
Simple merge
Simple merge
Simple merge
index 72b666bd3043422082de4b23f6266b9a0a8fe3b0,20f396d740fa40a9e5852741d338429ba5f37bb8..a2eb90169aed4dcee4b48541db475456b972e5bf
  #include "clock.h"
  #include "fuse.h"
  
- void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
 +#ifdef CONFIG_OF
 +static const struct of_device_id tegra_dt_irq_match[] __initconst = {
 +      { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
 +      { }
 +};
 +
 +void __init tegra_dt_init_irq(void)
 +{
 +      tegra_init_irq();
 +      of_irq_init(tegra_dt_irq_match);
 +}
 +#endif
 +
  void tegra_assert_system_reset(char mode, const char *cmd)
  {
 -      void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
 +      void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
        u32 reg;
  
 -      /* use *_related to avoid spinlock since caches are off */
        reg = readl_relaxed(reset);
 -      reg |= 0x04;
 +      reg |= 0x10;
        writel_relaxed(reg, reset);
  }
  
Simple merge
Simple merge
Simple merge