ARM: dts: hix5hd2: add sata node

Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
index 0da3f3b6721e62e9838b8185efa65aac0ec03b8e..375a10c6e88b34caf5484dd72ad9e37ef98b3276 100644 (file)
--- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
+++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
@@ -79,3 +79,8 @@
                reg = <1>;
        };
 };
+
+&ahci {
+        phys = <&sata_phy>;
+        phy-names = "sata-phy";
+};

diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 92522644c82b91029f9bd1775f984730d2f60649..18f52f0b5f8d05743f8d419747749e74a687d2c4 100644 (file)
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -213,5 +213,25 @@
                        interrupts = <0 67 4>;
                        clocks = <&clock HIX5HD2_USB_CLK>;
                };
+
+               peripheral_ctrl: syscon@a20000 {
+                       compatible = "syscon";
+                       reg = <0xa20000 0x1000>;
+               };
+
+               sata_phy: phy@1900000 {
+                       compatible = "hisilicon,hix5hd2-sata-phy";
+                       reg = <0x1900000 0x10000>;
+                       #phy-cells = <0>;
+                       hisilicon,peripheral-syscon = <&peripheral_ctrl>;
+                       hisilicon,power-reg = <0x8 10>;
+               };
+
+               ahci: sata@1900000 {
+                        compatible = "hisilicon,hisi-ahci";
+                        reg = <0x1900000 0x10000>;
+                        interrupts = <0 70 4>;
+                        clocks = <&clock HIX5HD2_SATA_CLK>;
+               };
        };
 };