drm/i915: Implement WaVSRefCountFullforceMissDisable

Implements WaVSRefCountFullforceMissDisable as documented in the BSpec
3D workarounds chapter.

Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a18218ccac1ecde14ff32c4e177e5f29ce2e2deb..0c89cf5377eac1f232bbbe31cf55b1bc6a6075fd 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -741,6 +741,7 @@
 #define   GEN7_FF_TS_SCHED_HS0         (0x3<<16)
 #define   GEN7_FF_TS_SCHED_LOAD_BALANCE        (0x1<<16)
 #define   GEN7_FF_TS_SCHED_HW          (0x0<<16) /* Default */
+#define   GEN7_FF_VS_REF_CNT_FFME      (1 << 15)
 #define   GEN7_FF_VS_SCHED_HS1         (0x5<<12)
 #define   GEN7_FF_VS_SCHED_HS0         (0x3<<12)
 #define   GEN7_FF_VS_SCHED_LOAD_BALANCE        (0x1<<12) /* Default */

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c97714e6a36369e3700eee2adfacc12306170f32..64d65f564a7c62149d0feb91d3e7c47273fbd733 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3680,6 +3680,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
        reg |= GEN7_FF_VS_SCHED_HW;
        reg |= GEN7_FF_DS_SCHED_HW;
 
+       /* WaVSRefCountFullforceMissDisable */
+       if (IS_HASWELL(dev_priv->dev))
+               reg &= ~GEN7_FF_VS_REF_CNT_FFME;
+
        I915_WRITE(GEN7_FF_THREAD_MODE, reg);
 }