ARM: bcm283x: Define UART pinmuxing on board level
authorStefan Wahren <stefan.wahren@i2se.com>
Sun, 30 Jul 2017 17:10:32 +0000 (19:10 +0200)
committerEric Anholt <eric@anholt.net>
Wed, 2 Aug 2017 22:17:36 +0000 (15:17 -0700)
Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in
order to take care of them and other boards in the future,
we need to define UART pinmuxing on board level.

This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011
onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign
uart0 to BT and uart1 to pin headers".

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
arch/arm/boot/dts/bcm2835-rpi-a.dts
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
arch/arm/boot/dts/bcm2835-rpi-b.dts
arch/arm/boot/dts/bcm2835-rpi-zero.dts
arch/arm/boot/dts/bcm2835-rpi.dtsi
arch/arm/boot/dts/bcm2836-rpi-2-b.dts
arch/arm/boot/dts/bcm2837-rpi-3-b.dts

index d0704540db6b3cc136bd92dfb3038077d8083312..9f866491efdf5ac6c3bad1f785a9837fce33073c 100644 (file)
@@ -99,3 +99,9 @@
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 46d078e29017eeda2ea5d92c6d0c21d1ce9deccd..4b1af06c8dc03157113781ab27e9085346cd59d9 100644 (file)
@@ -94,3 +94,9 @@
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 432088ebb0a19a97e5390a3c90f88af9f796476d..a846f1e781d8a30e2e0afeaed5e67c32005f9b97 100644 (file)
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 4133bc2cd9be309a3885e6d002b767fe2c4d0458..e860964e39fa9ce61fee3f858924019df37fdf81 100644 (file)
@@ -94,3 +94,9 @@
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 4d56fe3006b0c38b652d88b36af09306ea455b2e..5d77f3f8c4c58475fcf5948af3d5815f7b6cd728 100644 (file)
@@ -89,3 +89,9 @@
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 79a20d5209310b2cfd912a9dbf1e67bc5b804b4d..70362405c59522fb7835a7b4b13ebb43592edfc4 100644 (file)
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index e55b362b9d6e92124a22d6e5718adf1f63be3818..e36c392a2b8fdfe36dab81b0128e85dfd422ab7b 100644 (file)
@@ -39,7 +39,7 @@
        };
 
        alt0: alt0 {
-               brcm,pins = <4 5 7 8 9 10 11 14 15>;
+               brcm,pins = <4 5 7 8 9 10 11>;
                brcm,function = <BCM2835_FSEL_ALT0>;
        };
 };
index bf19e8cfb9e63cc9cd0a1c26e69a286b9a3c4bdf..e8de41444b68eed33efa16e92ddf29e3ace5fd1c 100644 (file)
@@ -39,3 +39,9 @@
 &hdmi {
        hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
 };
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
index 972f14db28accd1f25e5d5cd9d7ce2854c9976c8..20725ca487f30afd5e84059fbcb1513d3399cfa8 100644 (file)
        };
 };
 
+/* uart0 communicates with the BT module */
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>;
+       status = "okay";
+};
+
+/* uart1 is mapped to the pin header */
 &uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_gpio14>;
        status = "okay";
 };