#define WIDTH 84
#define HEIGHT 48
#define TXBUFLEN (84*6)
-#define DEFAULT_GAMMA "40" /* gamma is used to control contrast in this driver */
+#define DEFAULT_GAMMA "40" /* gamma controls the contrast in this driver */
static unsigned tc;
module_param(tc, uint, 0);
par->fbtftops.reset(par);
- /* Function set */
- write_reg(par, 0x21); /* 5:1 1
- 2:0 PD - Powerdown control: chip is active
- 1:0 V - Entry mode: horizontal addressing
- 0:1 H - Extended instruction set control: extended
- */
-
- /* H=1 Temperature control */
- write_reg(par, 0x04 | (tc & 0x3)); /*
- 2:1 1
- 1:x TC1 - Temperature Coefficient: 0x10
- 0:x TC0
- */
-
- /* H=1 Bias system */
- write_reg(par, 0x10 | (bs & 0x7)); /*
- 4:1 1
- 3:0 0
- 2:x BS2 - Bias System
- 1:x BS1
- 0:x BS0
- */
-
- /* Function set */
- write_reg(par, 0x22); /* 5:1 1
- 2:0 PD - Powerdown control: chip is active
- 1:1 V - Entry mode: vertical addressing
- 0:0 H - Extended instruction set control: basic
- */
-
- /* H=0 Display control */
- write_reg(par, 0x08 | 4); /*
- 3:1 1
- 2:1 D - DE: 10=normal mode
- 1:0 0
- 0:0 E
- */
+ /* Function set
+ *
+ * 5:1 1
+ * 2:0 PD - Powerdown control: chip is active
+ * 1:0 V - Entry mode: horizontal addressing
+ * 0:1 H - Extended instruction set control: extended
+ */
+ write_reg(par, 0x21);
+
+ /* H=1 Temperature control
+ *
+ * 2:1 1
+ * 1:x TC1 - Temperature Coefficient: 0x10
+ * 0:x TC0
+ */
+ write_reg(par, 0x04 | (tc & 0x3));
+
+ /* H=1 Bias system
+ *
+ * 4:1 1
+ * 3:0 0
+ * 2:x BS2 - Bias System
+ * 1:x BS1
+ * 0:x BS0
+ */
+ write_reg(par, 0x10 | (bs & 0x7));
+
+ /* Function set
+ *
+ * 5:1 1
+ * 2:0 PD - Powerdown control: chip is active
+ * 1:1 V - Entry mode: vertical addressing
+ * 0:0 H - Extended instruction set control: basic
+ */
+ write_reg(par, 0x22);
+
+ /* H=0 Display control
+ *
+ * 3:1 1
+ * 2:1 D - DE: 10=normal mode
+ * 1:0 0
+ * 0:0 E
+ */
+ write_reg(par, 0x08 | 4);
return 0;
}
fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n",
__func__, xs, ys, xe, ye);
- /* H=0 Set X address of RAM */
- write_reg(par, 0x80); /* 7:1 1
- 6-0: X[6:0] - 0x00
- */
-
- /* H=0 Set Y address of RAM */
- write_reg(par, 0x40); /* 7:0 0
- 6:1 1
- 2-0: Y[2:0] - 0x0
- */
+ /* H=0 Set X address of RAM
+ *
+ * 7:1 1
+ * 6-0: X[6:0] - 0x00
+ */
+ write_reg(par, 0x80);
+
+ /* H=0 Set Y address of RAM
+ *
+ * 7:0 0
+ * 6:1 1
+ * 2-0: Y[2:0] - 0x0
+ */
+ write_reg(par, 0x40);
}
static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)