drm/radeon/kms: set crtc and cursor offsets correctly on legacy chips.

The crtc and cursor offsets on the legacy chips are offset from
DISPLAY_BASE_ADDR. The code worked if display base addr was at 0,
but otherwise falls to pieces.

Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index 5232441f119b100077a828d2c13dc965054bfd63..5f8ce370c4f87a01bed901cf9156c9adce5bf1ec 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -113,7 +113,7 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
                WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
        else
                /* offset is from DISP(2)_BASE_ADDRESS */
-               WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, gpu_addr);
+               WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, (gpu_addr-radeon_crtc->legacy_display_base_addr));
 }
 
 int radeon_crtc_cursor_set(struct drm_crtc *crtc,

diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 8086ecf7f03d67657ebba92ce113f96fd56f407a..14c1a5107fc92ab5f4f28acba56e78d579108be8 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -244,7 +244,12 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
        if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
                return -EINVAL;
        }
-       crtc_offset = (u32)base;
+       /* if scanout was in GTT this really wouldn't work */
+       /* crtc offset is from display base addr not FB location */
+       radeon_crtc->legacy_display_base_addr = rdev->mc.vram_location;
+
+       base -= radeon_crtc->legacy_display_base_addr;
+
        crtc_offset_cntl = 0;
 
        pitch_pixels = crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8);
@@ -303,11 +308,9 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 
        base &= ~7;
 
-       /* update sarea TODO */
-
        crtc_offset = (u32)base;
 
-       WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, rdev->mc.vram_location);
+       WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);
 
        if (ASIC_IS_R300(rdev)) {
                if (radeon_crtc->crtc_id)

diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 9173b687462b01b470421e58a81bae0cc7c2ac3e..86f766e868e7751583efc3dd4277ac166efbf064 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -185,6 +185,7 @@ struct radeon_crtc {
        uint64_t cursor_addr;
        int cursor_width;
        int cursor_height;
+       uint32_t legacy_display_base_addr;
 };
 
 #define RADEON_USE_RMX 1