ARM: dts: berlin: convert BG2Q to DT clock nodes
authorAlexandre Belloni <alexandre.belloni@free-electrons.com>
Mon, 12 May 2014 20:07:35 +0000 (22:07 +0200)
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Mon, 19 May 2014 21:02:29 +0000 (23:02 +0200)
This converts Berlin BG2Q SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
arch/arm/boot/dts/berlin2q.dtsi

index 52c7d644e492913bd38642d971b7c855bec51b73..cd3287c95f1a38d0cdc3ba7b3de62c4d39abdcb5 100644 (file)
@@ -6,6 +6,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <dt-bindings/clock/berlin2q.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
                };
        };
 
-       smclk: sysmgr-clock {
+       refclk: oscillator {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <25000000>;
        };
 
-       cfgclk: config-clock {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <100000000>;
-       };
-
-       cpuclk: cpu-clock {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <1200000000>;
-       };
-
-       twdclk: twdclk {
-               compatible = "fixed-factor-clock";
-               #clock-cells = <0>;
-               clocks = <&cpuclk>;
-               clock-mult = <1>;
-               clock-div = <3>;
-       };
-
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -95,7 +76,7 @@
                local-timer@ad0600 {
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0xad0600 0x20>;
-                       clocks = <&twdclk>;
+                       clocks = <&chip CLKID_TWD>;
                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                        timer0: timer@2c00 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c00 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                interrupts = <8>;
                        };
                        timer1: timer@2c14 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c14 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer2: timer@2c28 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c28 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer3: timer@2c3c {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c3c 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer4: timer@2c50 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c50 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer5: timer@2c64 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c64 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer6: timer@2c78 {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c78 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        timer7: timer@2c8c {
                                compatible = "snps,dw-apb-timer";
                                reg = <0x2c8c 0x14>;
-                               clocks = <&cfgclk>;
+                               clocks = <&chip CLKID_CFG>;
                                clock-names = "timer";
                                status = "disabled";
                        };
                        };
                };
 
-               generic-regs@ea0110 {
-                       compatible = "marvell,berlin-generic-regs", "syscon";
-                       reg = <0xea0110 0x10>;
+               chip: chip-control@ea0000 {
+                       compatible = "marvell,berlin2q-chip-ctrl";
+                       #clock-cells = <1>;
+                       reg = <0xea0000 0x400>, <0xdd0170 0x10>;
+                       clocks = <&refclk>;
+                       clock-names = "refclk";
                };
 
                apb@fc0000 {
                                reg = <0x9000 0x100>;
                                interrupt-parent = <&sic>;
                                interrupts = <8>;
-                               clocks = <&smclk>;
+                               clocks = <&refclk>;
                                reg-shift = <2>;
                                status = "disabled";
                        };
                                reg = <0xa000 0x100>;
                                interrupt-parent = <&sic>;
                                interrupts = <9>;
-                               clocks = <&smclk>;
+                               clocks = <&refclk>;
                                reg-shift = <2>;
                                status = "disabled";
                        };