u16 reserved:1;
u16 txop:8;
}field;
-}frameqos,*pframeqos;
+} frameqos, *pframeqos;
/* SWEEP TABLE ENTRIES NUMBER*/
#define MAX_SWEEP_TAB_ENTRIES 42
long threshold_40Mhzto20Mhz;
bool bforced_tx20Mhz;
bool bautoswitch_enable;
-}bandwidth_autoswitch,*pbandwidth_autoswitch;
+} bandwidth_autoswitch, *pbandwidth_autoswitch;
//added by amy for order
//
bool bLeisurePs;
-}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL;
+} RT_POWER_SAVE_CONTROL, *PRT_POWER_SAVE_CONTROL;
typedef u32 RT_RF_CHANGE_SOURCE;
#define RF_CHANGE_BY_SW BIT31
HT_MCS14 = 0x00004000,
HT_MCS15 = 0x00008000,
// Do not define MCS32 here although 8190 support MCS32
-}HT_MCS_RATE,*PHT_MCS_RATE;
+} HT_MCS_RATE, *PHT_MCS_RATE;
//
// Represent Channel Width in HT Capabilities
typedef enum _ACK_POLICY{
eAckPlc0_ACK = 0x00,
eAckPlc1_NoACK = 0x01,
-}ACK_POLICY,*PACK_POLICY;
+} ACK_POLICY, *PACK_POLICY;
#define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
typedef enum _QOS_ELE_SUBTYPE{
QOSELE_TYPE_INFO = 0x00, // 0x00: Information element
QOSELE_TYPE_PARAM = 0x01, // 0x01: parameter element
-}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE;
+} QOS_ELE_SUBTYPE, *PQOS_ELE_SUBTYPE;
//
DIR_DOWN = 1, // 0x01 // DownLink
DIR_DIRECT = 2, // 0x10 // DirectLink
DIR_BI_DIR = 3, // 0x11 // Bi-Direction
-}DIRECTION_VALUE,*PDIRECTION_VALUE;
+} DIRECTION_VALUE, *PDIRECTION_VALUE;
//
eAcmWay0_SwAndHw = 0, // By SW and HW.
eAcmWay1_HW = 1, // By HW.
eAcmWay2_SW = 2, // By SW.
-}ACM_METHOD,*PACM_METHOD;
+} ACM_METHOD, *PACM_METHOD;
typedef struct _ACM{
VERSION_819xU_A, // A-cut
VERSION_819xU_B, // B-cut
VERSION_819xU_C,// C-cut
-}VERSION_819xU,*PVERSION_819xU;
+} VERSION_819xU, *PVERSION_819xU;
//added for different RF type
typedef enum _RT_RF_TYPE_DEF
{