arm: dts: qcom: Add TCSR support for APQ8064
authorAndy Gross <agross@codeaurora.org>
Mon, 9 Feb 2015 22:01:08 +0000 (16:01 -0600)
committerOlof Johansson <olof@lixom.net>
Fri, 3 Apr 2015 20:33:44 +0000 (13:33 -0700)
This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/qcom-apq8064.dtsi

index b3154c0716525a77f41c602d219f2360bb0ab1f5..f607900943924c357f5368b5790be48c6af2439d 100644 (file)
                gsbi1: gsbi@12440000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
+                       cell-index = <1>;
                        reg = <0x12440000 0x100>;
                        clocks = <&gcc GSBI1_H_CLK>;
                        clock-names = "iface";
                        #size-cells = <1>;
                        ranges;
 
+                       syscon-tcsr = <&tcsr>;
+
                        i2c1: i2c@12460000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
                                reg = <0x12460000 0x1000>;
                gsbi2: gsbi@12480000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
+                       cell-index = <2>;
                        reg = <0x12480000 0x100>;
                        clocks = <&gcc GSBI2_H_CLK>;
                        clock-names = "iface";
                        #size-cells = <1>;
                        ranges;
 
+                       syscon-tcsr = <&tcsr>;
+
                        i2c2: i2c@124a0000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
                                reg = <0x124a0000 0x1000>;
                gsbi7: gsbi@16600000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
+                       cell-index = <7>;
                        reg = <0x16600000 0x100>;
                        clocks = <&gcc GSBI7_H_CLK>;
                        clock-names = "iface";
                        #size-cells = <1>;
                        ranges;
 
+                       syscon-tcsr = <&tcsr>;
+
                        serial@16640000 {
                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
                                reg = <0x16640000 0x1000>,
                                pinctrl-0 = <&sdc4_gpios>;
                        };
                };
+
+               tcsr: syscon@1a400000 {
+                       compatible = "qcom,tcsr-apq8064", "syscon";
+                       reg = <0x1a400000 0x100>;
+               };
        };
 };