if (!hwif->dma_command)
hwif->dma_command = hwif->dma_base + 0;
- if (!hwif->dma_vendor1)
- hwif->dma_vendor1 = hwif->dma_base + 1;
if (!hwif->dma_status)
hwif->dma_status = hwif->dma_base + 2;
- if (!hwif->dma_vendor3)
- hwif->dma_vendor3 = hwif->dma_base + 3;
if (!hwif->dma_prdtable)
hwif->dma_prdtable = hwif->dma_base + 4;
{
u8 value;
- outb(index, hwif->dma_vendor1);
- value = inb(hwif->dma_vendor3);
+ outb(index, hwif->dma_base + 1);
+ value = inb(hwif->dma_base + 3);
DBG("index[%02X] value[%02X]\n", index, value);
return value;
*/
static void set_indexed_reg(ide_hwif_t *hwif, u8 index, u8 value)
{
- outb(index, hwif->dma_vendor1);
- outb(value, hwif->dma_vendor3);
+ outb(index, hwif->dma_base + 1);
+ outb(value, hwif->dma_base + 3);
DBG("index[%02X] value[%02X]\n", index, value);
}
unsigned long dma_base; /* base addr for dma ports */
unsigned long dma_command; /* dma command register */
- unsigned long dma_vendor1; /* dma vendor 1 register */
unsigned long dma_status; /* dma status register */
- unsigned long dma_vendor3; /* dma vendor 3 register */
unsigned long dma_prdtable; /* actual prd table address */
unsigned long config_data; /* for use by chipset-specific code */