qed: Add infrastructure for debug data collection
authorTomer Tayar <Tomer.Tayar@qlogic.com>
Mon, 5 Sep 2016 11:35:10 +0000 (14:35 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 6 Sep 2016 21:24:02 +0000 (14:24 -0700)
Adds support for several infrastructure operations that are done as part of
debug data collection.

Signed-off-by: Tomer Tayar <Tomer.Tayar@qlogic.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/qlogic/qed/qed_hsi.h
drivers/net/ethernet/qlogic/qed/qed_mcp.c
drivers/net/ethernet/qlogic/qed/qed_mcp.h
drivers/net/ethernet/qlogic/qed/qed_reg_addr.h

index a67b3554aabd3828302f717e8fb622c4efc091c4..855691f18412042f17a0e503b8f2b6f56d5414dc 100644 (file)
@@ -7638,6 +7638,7 @@ struct public_drv_mb {
 #define DRV_MSG_CODE_CFG_VF_MSIX               0xc0010000
 #define DRV_MSG_CODE_MCP_RESET                 0x00090000
 #define DRV_MSG_CODE_SET_VERSION               0x000f0000
+#define DRV_MSG_CODE_MCP_HALT                   0x00100000
 
 #define DRV_MSG_CODE_GET_STATS                  0x00130000
 #define DRV_MSG_CODE_STATS_TYPE_LAN             1
@@ -7645,6 +7646,8 @@ struct public_drv_mb {
 #define DRV_MSG_CODE_STATS_TYPE_ISCSI           3
 #define DRV_MSG_CODE_STATS_TYPE_RDMA            4
 
+#define DRV_MSG_CODE_MASK_PARITIES              0x001a0000
+
 #define DRV_MSG_CODE_BIST_TEST                 0x001e0000
 #define DRV_MSG_CODE_SET_LED_MODE              0x00200000
 
index 472268c021dbf63d802bfae076e04bf04b491b2d..7d39cb9b775b261a37c35914c2196b34ff410054 100644 (file)
@@ -389,6 +389,34 @@ int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
        return 0;
 }
 
+int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
+                      struct qed_ptt *p_ptt,
+                      u32 cmd,
+                      u32 param,
+                      u32 *o_mcp_resp,
+                      u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf)
+{
+       struct qed_mcp_mb_params mb_params;
+       union drv_union_data union_data;
+       int rc;
+
+       memset(&mb_params, 0, sizeof(mb_params));
+       mb_params.cmd = cmd;
+       mb_params.param = param;
+       mb_params.p_data_dst = &union_data;
+       rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc)
+               return rc;
+
+       *o_mcp_resp = mb_params.mcp_resp;
+       *o_mcp_param = mb_params.mcp_param;
+
+       *o_txn_size = *o_mcp_param;
+       memcpy(o_buf, &union_data.raw_data, *o_txn_size);
+
+       return 0;
+}
+
 int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
                     struct qed_ptt *p_ptt, u32 *p_load_code)
 {
@@ -1168,6 +1196,33 @@ qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
        return rc;
 }
 
+int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
+{
+       u32 resp = 0, param = 0;
+       int rc;
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MCP_HALT, 0, &resp,
+                        &param);
+       if (rc)
+               DP_ERR(p_hwfn, "MCP response failure, aborting\n");
+
+       return rc;
+}
+
+int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
+{
+       u32 value, cpu_mode;
+
+       qed_wr(p_hwfn, p_ptt, MCP_REG_CPU_STATE, 0xffffffff);
+
+       value = qed_rd(p_hwfn, p_ptt, MCP_REG_CPU_MODE);
+       value &= ~MCP_REG_CPU_MODE_SOFT_HALT;
+       qed_wr(p_hwfn, p_ptt, MCP_REG_CPU_MODE, value);
+       cpu_mode = qed_rd(p_hwfn, p_ptt, MCP_REG_CPU_MODE);
+
+       return (cpu_mode & MCP_REG_CPU_MODE_SOFT_HALT) ? -EAGAIN : 0;
+}
+
 int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
                    struct qed_ptt *p_ptt, enum qed_led_mode mode)
 {
@@ -1195,6 +1250,27 @@ int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
        return rc;
 }
 
+int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u32 mask_parities)
+{
+       u32 resp = 0, param = 0;
+       int rc;
+
+       rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_MASK_PARITIES,
+                        mask_parities, &resp, &param);
+
+       if (rc) {
+               DP_ERR(p_hwfn,
+                      "MCP response failure for mask parities, aborting\n");
+       } else if (resp != FW_MSG_CODE_OK) {
+               DP_ERR(p_hwfn,
+                      "MCP did not acknowledge mask parity request. Old MFW?\n");
+               rc = -EINVAL;
+       }
+
+       return rc;
+}
+
 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 {
        u32 drv_mb_param = 0, rsp, param;
index c6372fa574b7a848fbbb8d0939971b9245387097..dff520ed069bf61d951076bee5b82adf89f95c72 100644 (file)
@@ -467,6 +467,29 @@ int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
 int qed_mcp_reset(struct qed_hwfn *p_hwfn,
                  struct qed_ptt *p_ptt);
 
+/**
+ * @brief - Sends an NVM read command request to the MFW to get
+ *        a buffer.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
+ *            DRV_MSG_CODE_NVM_READ_NVRAM commands
+ * @param param - [0:23] - Offset [24:31] - Size
+ * @param o_mcp_resp - MCP response
+ * @param o_mcp_param - MCP response param
+ * @param o_txn_size -  Buffer size output
+ * @param o_buf - Pointer to the buffer returned by the MFW.
+ *
+ * @param return 0 upon success.
+ */
+int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
+                      struct qed_ptt *p_ptt,
+                      u32 cmd,
+                      u32 param,
+                      u32 *o_mcp_resp,
+                      u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
+
 /**
  * @brief indicates whether the MFW objects [under mcp_info] are accessible
  *
@@ -489,6 +512,26 @@ bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
                           struct qed_ptt *p_ptt, u8 vf_id, u8 num);
 
+/**
+ * @brief - Halt the MCP.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ *
+ * @param return 0 upon success.
+ */
+int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
+
+/**
+ * @brief - Wake up the MCP.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ *
+ * @param return 0 upon success.
+ */
+int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
+
 int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
 int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
 int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
@@ -500,4 +543,7 @@ int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
                                     struct qed_mcp_link_state *p_link,
                                     u8 min_bw);
 
+int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
+                         struct qed_ptt *p_ptt, u32 mask_parities);
+
 #endif
index b49d47f3de71cbe63619ba63c3232bad66b6f6e6..b44f09b18eb12c23cc72764397c729abcb8699df 100644 (file)
 
 #define QM_REG_WFQPFWEIGHT     0x2f4e80UL
 #define QM_REG_WFQVPWEIGHT     0x2fa000UL
+
+#define MCP_REG_CPU_MODE \
+       0xe05000UL
+#define MCP_REG_CPU_MODE_SOFT_HALT \
+               (0x1 << 10)
+
 #endif