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drm/i915: don't apply WaFbcAsynchFlipDisableFbcQueue on SKL
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Mon, 14 Sep 2015 18:20:01 +0000 (15:20 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 23 Sep 2015 12:39:19 +0000 (14:39 +0200)
This WA is only for HSW/BDW.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_fbc.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 2b75003eb79e06a5e756e2d960e3bc376a155288..56cf11094a04db3afa5346496c93a974246d2f51 100644 (file)
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -277,7 +277,7 @@ static void gen7_fbc_enable(struct intel_crtc *crtc)
                I915_WRITE(ILK_DISPLAY_CHICKEN1,
                           I915_READ(ILK_DISPLAY_CHICKEN1) |
                           ILK_FBCQ_DIS);
-       } else {
+       } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
                /* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
                I915_WRITE(CHICKEN_PIPESL_1(crtc->pipe),
                           I915_READ(CHICKEN_PIPESL_1(crtc->pipe)) |