ARM: tegra: Enable eDP for Venice2
authorThierry Reding <treding@nvidia.com>
Fri, 28 Feb 2014 16:40:24 +0000 (17:40 +0100)
committerStephen Warren <swarren@nvidia.com>
Fri, 28 Feb 2014 17:23:45 +0000 (10:23 -0700)
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the
Tegra124. The panel has an EDID to describe the video timings but needs
a few extra nodes to get the backlight to come up.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra124-venice2.dts

index b0db6348827f79a35d8c277297c09fe13d1fbe2f..7ffef561d667bc51babfb2df459fb4e256fa9bb8 100644 (file)
                reg = <0x80000000 0x80000000>;
        };
 
+       host1x@50000000 {
+               sor@54540000 {
+                       status = "okay";
+
+                       nvidia,dpaux = <&dpaux>;
+                       nvidia,panel = <&panel>;
+               };
+
+               dpaux: dpaux@545c0000 {
+                       vdd-supply = <&vdd_3v3_panel>;
+                       status = "okay";
+               };
+       };
+
        pinmux: pinmux@70000868 {
                pinctrl-names = "default";
                pinctrl-0 = <&pinmux_default>;
                };
        };
 
+       backlight: backlight {
+               compatible = "pwm-backlight";
+
+               enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+               power-supply = <&vdd_led>;
+               pwms = <&pwm 1 1000000>;
+
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+       };
+
        clocks {
                compatible = "simple-bus";
                #address-cells = <1>;
                };
        };
 
+       panel: panel {
+               compatible = "lg,lp129qe", "simple-panel";
+
+               backlight = <&backlight>;
+               ddc-i2c-bus = <&dpaux>;
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;