This signal index must be always allowed even if it's not clearly
defined in a domain in order to monitor a counter like 0x03020100
because it's the default value of signals.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
} else
return ret;
- for (i = 0; i < ARRAY_SIZE(args->v0.signal) && args->v0.signal[i]; i++) {
+ for (i = 0; i < ARRAY_SIZE(args->v0.signal); i++) {
sig[i] = nvkm_perfsig_find(ppm, args->v0.domain,
args->v0.signal[i], &dom);
- if (!sig[i])
+ if (args->v0.signal[i] && !sig[i])
return -EINVAL;
}
u32 src = 0x00000000;
int i;
- for (i = 0; i < 4 && ctr->signal[i]; i++)
- src |= (ctr->signal[i] - dom->signal) << (i * 8);
+ for (i = 0; i < 4; i++) {
+ if (ctr->signal[i])
+ src |= (ctr->signal[i] - dom->signal) << (i * 8);
+ }
nv_wr32(priv, dom->addr + 0x09c, 0x00040002);
nv_wr32(priv, dom->addr + 0x100, 0x00000000);
u32 src = 0x00000000;
int i;
- for (i = 0; i < 4 && ctr->signal[i]; i++)
- src |= (ctr->signal[i] - dom->signal) << (i * 8);
+ for (i = 0; i < 4; i++) {
+ if (ctr->signal[i])
+ src |= (ctr->signal[i] - dom->signal) << (i * 8);
+ }
nv_wr32(priv, 0x00a7c0 + dom->addr, 0x00000001);
nv_wr32(priv, 0x00a400 + dom->addr + (cntr->base.slot * 0x40), src);