drm/nouveau/pm: allow to monitor hardware signal index 0x00
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Sun, 7 Jun 2015 20:40:21 +0000 (22:40 +0200)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 28 Aug 2015 02:39:59 +0000 (12:39 +1000)
This signal index must be always allowed even if it's not clearly
defined in a domain in order to monitor a counter like 0x03020100
because it's the default value of signals.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c

index 71834b96ca9ef1fbba1f8b3763f7e5d701fdb93a..610c0ca5c80b80b86a7d85904d2108fd8f9036bc 100644 (file)
@@ -333,10 +333,10 @@ nvkm_perfctr_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
        } else
                return ret;
 
-       for (i = 0; i < ARRAY_SIZE(args->v0.signal) && args->v0.signal[i]; i++) {
+       for (i = 0; i < ARRAY_SIZE(args->v0.signal); i++) {
                sig[i] = nvkm_perfsig_find(ppm, args->v0.domain,
                                           args->v0.signal[i], &dom);
-               if (!sig[i])
+               if (args->v0.signal[i] && !sig[i])
                        return -EINVAL;
        }
 
index 69303b5dbcbcf3868df062370ddaeb4318782630..41350d6199a573655635ebff4adf85b6d5cef11c 100644 (file)
@@ -48,8 +48,10 @@ gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
        u32 src = 0x00000000;
        int i;
 
-       for (i = 0; i < 4 && ctr->signal[i]; i++)
-               src |= (ctr->signal[i] - dom->signal) << (i * 8);
+       for (i = 0; i < 4; i++) {
+               if (ctr->signal[i])
+                       src |= (ctr->signal[i] - dom->signal) << (i * 8);
+       }
 
        nv_wr32(priv, dom->addr + 0x09c, 0x00040002);
        nv_wr32(priv, dom->addr + 0x100, 0x00000000);
index ff22f06b22b8e2e56b0fff69ece5e815bbd4f435..603874ec0fbacabf0bad7587273911ba2019b2a6 100644 (file)
@@ -33,8 +33,10 @@ nv40_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
        u32 src = 0x00000000;
        int i;
 
-       for (i = 0; i < 4 && ctr->signal[i]; i++)
-               src |= (ctr->signal[i] - dom->signal) << (i * 8);
+       for (i = 0; i < 4; i++) {
+               if (ctr->signal[i])
+                       src |= (ctr->signal[i] - dom->signal) << (i * 8);
+       }
 
        nv_wr32(priv, 0x00a7c0 + dom->addr, 0x00000001);
        nv_wr32(priv, 0x00a400 + dom->addr + (cntr->base.slot * 0x40), src);