drm/nouveau/disp/gt215-: port HDA ELD controls to nvkm_ior
authorBen Skeggs <bskeggs@redhat.com>
Fri, 19 May 2017 13:59:35 +0000 (23:59 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 16 Jun 2017 04:04:56 +0000 (14:04 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
20 files changed:
drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c

index d4df1983f7696545413b9e37a7ca12878c136f94..bb816f78230fca560e544d8c94e9747587fb449d 100644 (file)
@@ -507,9 +507,7 @@ gf119_disp = {
        .outp.internal.lvds = nv50_sor_output_new,
        .outp.internal.dp = gf119_sor_dp_new,
        .dac = { .nr = 3, .new = gf119_dac_new },
-       .sor.nr = 4,
-       .sor.new = gf119_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
+       .sor = { .nr = 4, .new = gf119_sor_new },
 };
 
 int
index 4d22d87c46200e35d4dda86f9e42fed41f57198b..e45cc01aed1c223a2cb3882a02c72eabb396ad95 100644 (file)
@@ -39,9 +39,7 @@ gk104_disp = {
        .outp.internal.lvds = nv50_sor_output_new,
        .outp.internal.dp = gf119_sor_dp_new,
        .dac = { .nr = 3, .new = gf119_dac_new },
-       .sor.nr = 4,
-       .sor.new = gk104_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
+       .sor = { .nr = 4, .new = gk104_sor_new },
 };
 
 int
index adc2a2257438cfaee833eef7142ee29eee13460b..e0990ffd3f5799b7ade8ff8a1695631273cd440e 100644 (file)
@@ -39,9 +39,7 @@ gk110_disp = {
        .outp.internal.lvds = nv50_sor_output_new,
        .outp.internal.dp = gf119_sor_dp_new,
        .dac = { .nr = 3, .new = gf119_dac_new },
-       .sor.nr = 4,
-       .sor.new = gk104_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
+       .sor = { .nr = 4, .new = gk104_sor_new },
 };
 
 int
index 116b99b513599e9777ea1049797e7524eee9d457..e42ab42b9dd1a49f90118ae4179e96ccbca62522 100644 (file)
@@ -39,9 +39,7 @@ gm107_disp = {
        .outp.internal.lvds = nv50_sor_output_new,
        .outp.internal.dp = gm107_sor_dp_new,
        .dac = { .nr = 3, .new = gf119_dac_new },
-       .sor.nr = 4,
-       .sor.new = gm107_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
+       .sor = { .nr = 4, .new = gm107_sor_new },
 };
 
 int
index ffdb5a412821538a5b0d67849bf4ce9d2773363a..287c00159481a257b689580bbfcd5a4eef275d07 100644 (file)
@@ -41,7 +41,6 @@ gm200_disp = {
        .dac = { .nr = 3, .new = gf119_dac_new },
        .sor.nr = 4,
        .sor.new = gm200_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
        .sor.magic = gm200_sor_magic,
 };
 
index bd5ab596877bf2a7a6a42ca45b55c73b076606be..c83883c0bd433397ba33bd9eedf4acf6874ddcbe 100644 (file)
@@ -39,7 +39,6 @@ gp100_disp = {
        .outp.internal.dp = gm200_sor_dp_new,
        .sor.nr = 4,
        .sor.new = gm200_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
        .sor.magic = gm200_sor_magic,
 };
 
index 4875d4822d42f8bf5d486fc8687206a63c281f8f..bac4d05a0015da96a374352f0f7cb7295696303a 100644 (file)
@@ -65,7 +65,6 @@ gp102_disp = {
        .outp.internal.dp = gm200_sor_dp_new,
        .sor.nr = 4,
        .sor.new = gm200_sor_new,
-       .sor.hda_eld = gf119_hda_eld,
        .sor.magic = gm200_sor_magic,
 };
 
index 4edd371245360782bd9926c9537bbacb491b6f5c..0c761feca2d4e7c2ee5be6ed9c68815ca9c8af32 100644 (file)
@@ -40,9 +40,7 @@ gt215_disp = {
        .outp.external.tmds = nv50_pior_output_new,
        .outp.external.dp = nv50_pior_dp_new,
        .dac = { .nr = 3, .new = nv50_dac_new },
-       .sor.nr = 4,
-       .sor.new = gt215_sor_new,
-       .sor.hda_eld = gt215_hda_eld,
+       .sor = { .nr = 4, .new = gt215_sor_new },
        .pior = { .nr = 3, .new = nv50_pior_new },
 };
 
index da6129b2b78f500b440dadbc4202a98aafbb73f4..0fa0ec0a1de001e304eb9d54aff2ca6aae5067cf 100644 (file)
  *
  * Authors: Ben Skeggs
  */
-#include "nv50.h"
-#include "outp.h"
+#include "ior.h"
 
-#include <core/client.h>
-#include <subdev/bios.h>
-#include <subdev/bios/dcb.h>
-#include <subdev/timer.h>
-
-#include <nvif/cl5070.h>
-#include <nvif/unpack.h>
-
-int
-gf119_hda_eld(NV50_DISP_MTHD_V1)
+void
+gf119_hda_eld(struct nvkm_ior *ior, u8 *data, u8 size)
 {
-       struct nvkm_device *device = disp->base.engine.subdev.device;
-       union {
-               struct nv50_disp_sor_hda_eld_v0 v0;
-       } *args = data;
-       const u32 soff = outp->or * 0x030;
-       const u32 hoff = head * 0x800;
-       int ret = -ENOSYS, i;
+       struct nvkm_device *device = ior->disp->engine.subdev.device;
+       const u32 soff = 0x030 * ior->id;
+       int i;
 
-       nvif_ioctl(object, "disp sor hda eld size %d\n", size);
-       if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
-               nvif_ioctl(object, "disp sor hda eld vers %d\n",
-                          args->v0.version);
-               if (size > 0x60)
-                       return -E2BIG;
-       } else
-               return ret;
+       for (i = 0; i < size; i++)
+               nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | data[i]);
+       for (; i < 0x60; i++)
+               nvkm_wr32(device, 0x10ec00 + soff, (i << 8));
+       nvkm_mask(device, 0x10ec10 + soff, 0x80000002, 0x80000002);
+}
 
-       if (size && args->v0.data[0]) {
-               if (outp->info.type == DCB_OUTPUT_DP) {
-                       nvkm_mask(device, 0x616618 + hoff, 0x8000000c, 0x80000001);
-                       nvkm_msec(device, 2000,
-                               u32 tmp = nvkm_rd32(device, 0x616618 + hoff);
-                               if (!(tmp & 0x80000000))
-                                       break;
-                       );
-               }
+void
+gf119_hda_hpd(struct nvkm_ior *ior, int head, bool present)
+{
+       struct nvkm_device *device = ior->disp->engine.subdev.device;
+       const u32 hoff = 0x800 * head;
+       u32 data = 0x80000000;
+       u32 mask = 0x80000001;
+       if (present) {
                nvkm_mask(device, 0x616548 + hoff, 0x00000070, 0x00000000);
-               for (i = 0; i < size; i++)
-                       nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | args->v0.data[i]);
-               for (; i < 0x60; i++)
-                       nvkm_wr32(device, 0x10ec00 + soff, (i << 8));
-               nvkm_mask(device, 0x10ec10 + soff, 0x80000003, 0x80000003);
+               data |= 0x00000001;
        } else {
-               if (outp->info.type == DCB_OUTPUT_DP) {
-                       nvkm_mask(device, 0x616618 + hoff, 0x80000001, 0x80000000);
-                       nvkm_msec(device, 2000,
-                               u32 tmp = nvkm_rd32(device, 0x616618 + hoff);
-                               if (!(tmp & 0x80000000))
-                                       break;
-                       );
-               }
-               nvkm_mask(device, 0x10ec10 + soff, 0x80000003, 0x80000000 | !!size);
+               mask |= 0x00000002;
        }
-
-       return 0;
+       nvkm_mask(device, 0x10ec10 + ior->id * 0x030, mask, data);
 }
index f8f2f16c22a2a2502bf283c63a5d1fc124d0ff89..4509d2ba880ea12f965b6c13ddfef80ec323a201 100644 (file)
  *
  * Authors: Ben Skeggs
  */
-#include "nv50.h"
-#include "outp.h"
+#include "ior.h"
 
-#include <core/client.h>
-#include <subdev/timer.h>
-
-#include <nvif/cl5070.h>
-#include <nvif/unpack.h>
-
-int
-gt215_hda_eld(NV50_DISP_MTHD_V1)
+void
+gt215_hda_eld(struct nvkm_ior *ior, u8 *data, u8 size)
 {
-       struct nvkm_device *device = disp->base.engine.subdev.device;
-       union {
-               struct nv50_disp_sor_hda_eld_v0 v0;
-       } *args = data;
-       const u32 soff = outp->or * 0x800;
-       int ret = -ENOSYS, i;
-
-       nvif_ioctl(object, "disp sor hda eld size %d\n", size);
-       if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
-               nvif_ioctl(object, "disp sor hda eld vers %d\n",
-                          args->v0.version);
-               if (size > 0x60)
-                       return -E2BIG;
-       } else
-               return ret;
+       struct nvkm_device *device = ior->disp->engine.subdev.device;
+       const u32 soff = ior->id * 0x800;
+       int i;
 
-       if (size && args->v0.data[0]) {
-               if (outp->info.type == DCB_OUTPUT_DP) {
-                       nvkm_mask(device, 0x61c1e0 + soff, 0x8000000d, 0x80000001);
-                       nvkm_msec(device, 2000,
-                               u32 tmp = nvkm_rd32(device, 0x61c1e0 + soff);
-                               if (!(tmp & 0x80000000))
-                                       break;
-                       );
-               }
-               for (i = 0; i < size; i++)
-                       nvkm_wr32(device, 0x61c440 + soff, (i << 8) | args->v0.data[i]);
-               for (; i < 0x60; i++)
-                       nvkm_wr32(device, 0x61c440 + soff, (i << 8));
-               nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000003);
-       } else {
-               if (outp->info.type == DCB_OUTPUT_DP) {
-                       nvkm_mask(device, 0x61c1e0 + soff, 0x80000001, 0x80000000);
-                       nvkm_msec(device, 2000,
-                               u32 tmp = nvkm_rd32(device, 0x61c1e0 + soff);
-                               if (!(tmp & 0x80000000))
-                                       break;
-                       );
-               }
-               nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000000 | !!size);
-       }
+       for (i = 0; i < size; i++)
+               nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]);
+       for (; i < 0x60; i++)
+               nvkm_wr32(device, 0x61c440 + soff, (i << 8));
+       nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002);
+}
 
-       return 0;
+void
+gt215_hda_hpd(struct nvkm_ior *ior, int head, bool present)
+{
+       struct nvkm_device *device = ior->disp->engine.subdev.device;
+       u32 data = 0x80000000;
+       u32 mask = 0x80000001;
+       if (present)
+               data |= 0x00000001;
+       else
+               mask |= 0x00000002;
+       nvkm_mask(device, 0x61c448 + ior->id * 0x800, mask, data);
 }
index 3295a6a23fb838c603247ede4b39e65c01826087..0127474dc6c23c39ffdab0fbe78edb6bd93aed84 100644 (file)
@@ -58,7 +58,13 @@ struct nvkm_ior_func {
                void (*pattern)(struct nvkm_ior *, int pattern);
                void (*drive)(struct nvkm_ior *, int ln, int pc,
                              int dc, int pe, int tx_pu);
+               void (*audio)(struct nvkm_ior *, int head, bool enable);
        } dp;
+
+       struct {
+               void (*hpd)(struct nvkm_ior *, int head, bool present);
+               void (*eld)(struct nvkm_ior *, u8 *data, u8 size);
+       } hda;
 };
 
 int nvkm_ior_new_(const struct nvkm_ior_func *func, struct nvkm_disp *,
@@ -90,10 +96,13 @@ void g94_sor_dp_power(struct nvkm_ior *, int);
 void g94_sor_dp_pattern(struct nvkm_ior *, int);
 void g94_sor_dp_drive(struct nvkm_ior *, int, int, int, int, int);
 
+void gt215_sor_dp_audio(struct nvkm_ior *, int, bool);
+
 void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
 int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
 void gf119_sor_dp_pattern(struct nvkm_ior *, int);
 void gf119_sor_dp_drive(struct nvkm_ior *, int, int, int, int, int);
+void gf119_sor_dp_audio(struct nvkm_ior *, int, bool);
 
 void gm107_sor_dp_pattern(struct nvkm_ior *, int);
 
@@ -102,6 +111,12 @@ void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
 void gf119_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
 void gk104_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
 
+void gt215_hda_hpd(struct nvkm_ior *, int, bool);
+void gt215_hda_eld(struct nvkm_ior *, u8 *, u8);
+
+void gf119_hda_hpd(struct nvkm_ior *, int, bool);
+void gf119_hda_eld(struct nvkm_ior *, u8 *, u8);
+
 #define IOR_MSG(i,l,f,a...) do {                                               \
        struct nvkm_ior *_ior = (i);                                           \
        nvkm_##l(&_ior->disp->engine.subdev, "%s: "f, _ior->name, ##a);        \
index 11ec2960c9ac12679a2fadbdc2fba233c725a028..80e0f523f07105e1ffc08c9f94f5529db540ded1 100644 (file)
@@ -38,9 +38,7 @@ mcp89_disp = {
        .outp.external.tmds = nv50_pior_output_new,
        .outp.external.dp = nv50_pior_dp_new,
        .dac = { .nr = 3, .new = nv50_dac_new },
-       .sor.nr = 4,
-       .sor.new = mcp89_sor_new,
-       .sor.hda_eld = gt215_hda_eld,
+       .sor = { .nr = 4, .new = mcp89_sor_new },
        .pior = { .nr = 3, .new = nv50_pior_new },
 };
 
index aa7b0739d874b8778c1f912c20d3bd53e085eaba..d00ce1da1637478f25476d8b4afff4593659908e 100644 (file)
@@ -4,10 +4,6 @@
 #include "priv.h"
 #include "dp.h"
 
-#define NV50_DISP_MTHD_ struct nvkm_object *object,                            \
-       struct nv50_disp *disp, void *data, u32 size
-#define NV50_DISP_MTHD_V1 NV50_DISP_MTHD_, int head, struct nvkm_output *outp
-
 struct nv50_disp {
        const struct nv50_disp_func *func;
        struct nvkm_disp base;
@@ -31,9 +27,6 @@ struct nv50_disp {
 
 void nv50_disp_super_1(struct nv50_disp *);
 
-int gt215_hda_eld(NV50_DISP_MTHD_V1);
-int gf119_hda_eld(NV50_DISP_MTHD_V1);
-
 int nv50_disp_new_(const struct nv50_disp_func *, struct nvkm_device *,
                   int index, int heads, struct nvkm_disp **);
 int gf119_disp_new_(const struct nv50_disp_func *, struct nvkm_device *,
@@ -78,7 +71,6 @@ struct nv50_disp_func {
        struct {
                int nr;
                int (*new)(struct nvkm_disp *, int id);
-               int (*hda_eld)(NV50_DISP_MTHD_V1);
                void (*magic)(struct nvkm_output *);
        } sor;
 
index a81928de6dcdb39cccb8463f25f95431facb9a8e..d6371110f5a0be4af36878560897b7c6c3590123 100644 (file)
@@ -43,7 +43,6 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
        } *args = data;
        struct nv50_disp_root *root = nv50_disp_root(object);
        struct nv50_disp *disp = root->disp;
-       const struct nv50_disp_func *func = disp->func;
        struct nvkm_outp *temp, *outp = NULL;
        struct nvkm_head *head;
        u16 type, mask = 0;
@@ -112,10 +111,39 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
                        return ret;
        }
                break;
-       case NV50_DISP_MTHD_V1_SOR_HDA_ELD:
-               if (!func->sor.hda_eld)
+       case NV50_DISP_MTHD_V1_SOR_HDA_ELD: {
+               union {
+                       struct nv50_disp_sor_hda_eld_v0 v0;
+               } *args = data;
+               struct nvkm_ior *ior = outp->ior;
+               int ret = -ENOSYS;
+
+               nvif_ioctl(object, "disp sor hda eld size %d\n", size);
+               if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
+                       nvif_ioctl(object, "disp sor hda eld vers %d\n",
+                                  args->v0.version);
+                       if (size > 0x60)
+                               return -E2BIG;
+               } else
+                       return ret;
+
+               if (!ior->func->hda.hpd)
                        return -ENODEV;
-               return func->sor.hda_eld(object, disp, data, size, hidx, outp);
+
+               if (size && args->v0.data[0]) {
+                       if (outp->info.type == DCB_OUTPUT_DP)
+                               ior->func->dp.audio(ior, hidx, true);
+                       ior->func->hda.hpd(ior, hidx, true);
+                       ior->func->hda.eld(ior, data, size);
+               } else {
+                       if (outp->info.type == DCB_OUTPUT_DP)
+                               ior->func->dp.audio(ior, hidx, false);
+                       ior->func->hda.hpd(ior, hidx, false);
+               }
+
+               return 0;
+       }
+               break;
        case NV50_DISP_MTHD_V1_SOR_HDMI_PWR: {
                union {
                        struct nv50_disp_sor_hdmi_pwr_v0 v0;
index 48091e15c973c2a31543799cccf5a577f6f2626e..c3dbfd26ace895bc6125e71236072e5b2d63b9fd 100644 (file)
 #include "ior.h"
 #include "nv50.h"
 
+#include <subdev/timer.h>
+
+void
+gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
+{
+       struct nvkm_device *device = sor->disp->engine.subdev.device;
+       const u32 hoff = 0x800 * head;
+       const u32 data = 0x80000000 | (0x00000001 * enable);
+       const u32 mask = 0x8000000d;
+       nvkm_mask(device, 0x616618 + hoff, mask, data);
+       nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x616618 + hoff) & 0x80000000))
+                       break;
+       );
+}
+
 void
 gf119_sor_dp_vcpi(struct nvkm_output_dp *outp, int head, u8 slot,
                  u8 slot_nr, u16 pbn, u16 aligned)
@@ -131,6 +147,11 @@ gf119_sor = {
                .links = gf119_sor_dp_links,
                .power = g94_sor_dp_power,
                .pattern = gf119_sor_dp_pattern,
+               .audio = gf119_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gf119_hda_hpd,
+               .eld = gf119_hda_eld,
        },
 };
 
index 55a5a56b3723e09a957c8b90d1994c8db33398e1..ee6bf54077a2b4a983faaa6498686949e0dd837c 100644 (file)
@@ -34,6 +34,11 @@ gk104_sor = {
                .power = g94_sor_dp_power,
                .pattern = gf119_sor_dp_pattern,
                .drive = gf119_sor_dp_drive,
+               .audio = gf119_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gf119_hda_hpd,
+               .eld = gf119_hda_eld,
        },
 };
 
index 40c7eff35a9398eeda51b6f4fd3c9c519ee4119d..a6710758d7ed1e2a2937061df6a3cd1dc163b434 100644 (file)
@@ -61,6 +61,11 @@ gm107_sor = {
                .power = g94_sor_dp_power,
                .pattern = gm107_sor_dp_pattern,
                .drive = gf119_sor_dp_drive,
+               .audio = gf119_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gf119_hda_hpd,
+               .eld = gf119_hda_eld,
        },
 };
 
index 5efec0f480fa3e6e557027e721be41e80843d6a3..3b152e116b8801ee5747e012d6149ff74c6fcad4 100644 (file)
@@ -83,6 +83,11 @@ gm200_sor = {
                .power = g94_sor_dp_power,
                .pattern = gm107_sor_dp_pattern,
                .drive = gm200_sor_dp_drive,
+               .audio = gf119_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gf119_hda_hpd,
+               .eld = gf119_hda_eld,
        },
 };
 
index eb084102baffa4849a91fc591bf6ce4939cae34d..5e9126e832ffefdfa5d262769d92d40f8097dc17 100644 (file)
  */
 #include "ior.h"
 
+#include <subdev/timer.h>
+
+void
+gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
+{
+       struct nvkm_device *device = sor->disp->engine.subdev.device;
+       const u32 soff = nv50_ior_base(sor);
+       const u32 data = 0x80000000 | (0x00000001 * enable);
+       const u32 mask = 0x8000000d;
+       nvkm_mask(device, 0x61c1e0 + soff, mask, data);
+       nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000))
+                       break;
+       );
+}
+
 static const struct nvkm_ior_func
 gt215_sor = {
        .state = g94_sor_state,
@@ -34,6 +50,11 @@ gt215_sor = {
                .power = g94_sor_dp_power,
                .pattern = g94_sor_dp_pattern,
                .drive = g94_sor_dp_drive,
+               .audio = gt215_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gt215_hda_hpd,
+               .eld = gt215_hda_eld,
        },
 };
 
index 385c4d13c58ec411c1223d48aa56b1874e3cde49..dd76351d2ccb4bc1f90df663fabc4d77b51379cb 100644 (file)
@@ -34,6 +34,11 @@ mcp89_sor = {
                .power = g94_sor_dp_power,
                .pattern = g94_sor_dp_pattern,
                .drive = g94_sor_dp_drive,
+               .audio = gt215_sor_dp_audio,
+       },
+       .hda = {
+               .hpd = gt215_hda_hpd,
+               .eld = gt215_hda_eld,
        },
 };