drm/amdgpu: add cgs_interface for pg and cg
authorrezhu <rezhu@amd.com>
Fri, 7 Aug 2015 05:37:56 +0000 (13:37 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 17 Aug 2015 20:50:12 +0000 (16:50 -0400)
v3: check whether ip_blocks is enable
v2: add break in the for loop.

Signed-off-by: Rex zhu <rezhu@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
drivers/gpu/drm/amd/include/cgs_common.h

index 520d01715737b816ca6d2658c356a0fdb62f7624..6b1243f9f86d784fec716415122a37fa61113cf8 100644 (file)
@@ -614,6 +614,49 @@ static int amdgpu_cgs_irq_put(void *cgs_device, unsigned src_id, unsigned type)
        return amdgpu_irq_put(adev, adev->irq.sources[src_id], type);
 }
 
+int amdgpu_cgs_set_clockgating_state(void *cgs_device,
+                                 enum amd_ip_block_type block_type,
+                                 enum amd_clockgating_state state)
+{
+       CGS_FUNC_ADEV;
+       int i, r = -1;
+
+       for (i = 0; i < adev->num_ip_blocks; i++) {
+               if (!adev->ip_block_status[i].valid)
+                       continue;
+
+               if (adev->ip_blocks[i].type == block_type) {
+                       r = adev->ip_blocks[i].funcs->set_clockgating_state(
+                                                               (void *)adev,
+                                                                       state);
+                       break;
+               }
+       }
+       return r;
+}
+
+int amdgpu_cgs_set_powergating_state(void *cgs_device,
+                                 enum amd_ip_block_type block_type,
+                                 enum amd_powergating_state state)
+{
+       CGS_FUNC_ADEV;
+       int i, r = -1;
+
+       for (i = 0; i < adev->num_ip_blocks; i++) {
+               if (!adev->ip_block_status[i].valid)
+                       continue;
+
+               if (adev->ip_blocks[i].type == block_type) {
+                       r = adev->ip_blocks[i].funcs->set_powergating_state(
+                                                               (void *)adev,
+                                                                       state);
+                       break;
+               }
+       }
+       return r;
+}
+
+
 static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type)
 {
        CGS_FUNC_ADEV;
@@ -760,7 +803,9 @@ static const struct cgs_ops amdgpu_cgs_ops = {
        amdgpu_cgs_pm_request_engine,
        amdgpu_cgs_pm_query_clock_limits,
        amdgpu_cgs_set_camera_voltages,
-       amdgpu_cgs_get_firmware_info
+       amdgpu_cgs_get_firmware_info,
+       amdgpu_cgs_set_powergating_state,
+       amdgpu_cgs_set_clockgating_state
 };
 
 static const struct cgs_os_ops amdgpu_cgs_os_ops = {
index 582e75da1504ee5695be53952c5f2d9ad3116746..992dcd8a5c6ade080400f765082b03ad466d27d3 100644 (file)
@@ -24,6 +24,7 @@
 #ifndef _CGS_COMMON_H
 #define _CGS_COMMON_H
 
+#include "amd_shared.h"
 
 /**
  * enum cgs_gpu_mem_type - GPU memory types
@@ -484,6 +485,13 @@ typedef int (*cgs_get_firmware_info)(void *cgs_device,
                                     enum cgs_ucode_id type,
                                     struct cgs_firmware_info *info);
 
+typedef int(*cgs_set_powergating_state)(void *cgs_device,
+                                 enum amd_ip_block_type block_type,
+                                 enum amd_powergating_state state);
+
+typedef int(*cgs_set_clockgating_state)(void *cgs_device,
+                                 enum amd_ip_block_type block_type,
+                                 enum amd_clockgating_state state);
 
 struct cgs_ops {
        /* memory management calls (similar to KFD interface) */
@@ -522,6 +530,9 @@ struct cgs_ops {
        cgs_set_camera_voltages_t set_camera_voltages;
        /* Firmware Info */
        cgs_get_firmware_info get_firmware_info;
+       /* cg pg interface*/
+       cgs_set_powergating_state set_powergating_state;
+       cgs_set_clockgating_state set_clockgating_state;
        /* ACPI (TODO) */
 };
 
@@ -605,5 +616,9 @@ struct cgs_device
        CGS_CALL(set_camera_voltages,dev,mask,voltages)
 #define cgs_get_firmware_info(dev, type, info) \
        CGS_CALL(get_firmware_info, dev, type, info)
+#define cgs_set_powergating_state(dev, block_type, state)      \
+       CGS_CALL(set_powergating_state, dev, block_type, state)
+#define cgs_set_clockgating_state(dev, block_type, state)      \
+       CGS_CALL(set_clockgating_state, dev, block_type, state)
 
 #endif /* _CGS_COMMON_H */