ARM: dts: sk-rzg1m: add SCIF0 pins

Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
index 3a22538208f25117ea008e45a45d52c03c9b4ba5..97a066c22003a5941a44058ea334087857e9685c 100644 (file)
--- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
@@ -1,7 +1,7 @@
 /*
  * Device Tree Source for the SK-RZG1M board
  *
- * Copyright (C) 2016 Cogent Embedded, Inc.
+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
@@ -39,7 +39,17 @@
        clock-frequency = <20000000>;
 };
 
+&pfc {
+       scif0_pins: scif0 {
+               groups = "scif0_data_d";
+               function = "scif0";
+       };
+};
+
 &scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };