drm/amdgpu: correct reference clock value on vega10
authorKen Wang <Ken.Wang@amd.com>
Fri, 29 Sep 2017 07:41:43 +0000 (15:41 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 5 Dec 2017 10:26:35 +0000 (11:26 +0100)
commit 76d6172b6fab16455af4b67bb18a3f66011592f8 upstream.

Old value from bringup was wrong.

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/amdgpu/soc15.c

index f2c3a49f73a0051b74c602990d6e18ea64928eda..3e59c766722cfb2e1841d97670fcd3ffb6f12232 100644 (file)
@@ -279,10 +279,7 @@ static void soc15_init_golden_registers(struct amdgpu_device *adev)
 }
 static u32 soc15_get_xclk(struct amdgpu_device *adev)
 {
-       if (adev->asic_type == CHIP_VEGA10)
-               return adev->clock.spll.reference_freq/4;
-       else
-               return adev->clock.spll.reference_freq;
+       return adev->clock.spll.reference_freq;
 }