drm/i915: fix render pipe control notify on sandybridge
authorZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 19 Aug 2010 01:46:15 +0000 (09:46 +0800)
committerEric Anholt <eric@anholt.net>
Sun, 22 Aug 2010 06:28:54 +0000 (23:28 -0700)
This one is missed in last pipe control fix for sandybridge,
that really unmask interrupt bit for notify in render engine IMR.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/i915_irq.c

index 69a36fc035dc92a892baf3929b1dbb360540f982..16861b800feeb46577f35e616c3d891b6dff9f4e 100644 (file)
@@ -1381,12 +1381,17 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
        I915_WRITE(DEIER, dev_priv->de_irq_enable_reg);
        (void) I915_READ(DEIER);
 
-       /* user interrupt should be enabled, but masked initial */
+       /* Gen6 only needs render pipe_control now */
+       if (IS_GEN6(dev))
+               render_mask = GT_PIPE_NOTIFY;
+
        dev_priv->gt_irq_mask_reg = ~render_mask;
        dev_priv->gt_irq_enable_reg = render_mask;
 
        I915_WRITE(GTIIR, I915_READ(GTIIR));
        I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg);
+       if (IS_GEN6(dev))
+               I915_WRITE(GEN6_RENDER_IMR, ~GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT);
        I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg);
        (void) I915_READ(GTIER);