[9810] thermal: samsung: reduce TMU sending time
authorEunseok Choi <es10.choi@samsung.com>
Tue, 30 May 2017 07:23:42 +0000 (16:23 +0900)
committerChungwoo Park <cww.park@samsung.com>
Mon, 21 May 2018 08:18:52 +0000 (17:18 +0900)
Change-Id: I624b15d3a2c4173f593dcff1e18c3481563c8114
Signed-off-by: Eunseok Choi <es10.choi@samsung.com>
drivers/thermal/samsung/exynos_tmu.c

index acebe3a4f3bf89804bfbe9eb0f8586a1842ec407..c489025989cb4836c815b8fed35a3da9b3ab0f7c 100644 (file)
 #define EXYNOS_TMU_CLK_SENSE_ON_SHIFT          (16)
 #define EXYNOS_TMU_CLK_SENSE_ON_MASK           (0xffff)
 #define EXYNOS_TMU_TEM1456X_SENSE_VALUE                (0x0A28)
+#define EXYNOS_TMU_TEM1051X_SENSE_VALUE                (0x028A)
 
 #define EXYNOS_TMU_NUM_PROBE_SHIFT             (16)
 #if defined(CONFIG_SOC_EXYNOS9810)
@@ -1134,6 +1135,7 @@ static void exynos9810_tmu_control(struct platform_device *pdev, bool on)
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
        unsigned int trim, ctrl, con1, avgc;
        unsigned int t_buf_vref_sel, t_buf_slope_sel, avg_mode;
+       unsigned int counter_value;
 
        tmu_core_disable(pdev);
        tmu_irqs_disable(pdev);
@@ -1177,6 +1179,17 @@ static void exynos9810_tmu_control(struct platform_device *pdev, bool on)
        }
        writel(avgc, data->base + EXYNOS_TMU_REG_AVG_CON);
 
+       /* set COUNTER_VALUE */
+       counter_value = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE0);
+       counter_value &= ~(EXYNOS_TMU_EN_TEMP_SEN_OFF_MASK << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT);
+       counter_value |= EXYNOS_TMU_TEM1051X_SENSE_VALUE << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT;
+       writel(counter_value, data->base + EXYNOS_TMU_REG_COUNTER_VALUE0);
+
+       counter_value = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE1);
+       counter_value &= ~(EXYNOS_TMU_CLK_SENSE_ON_MASK << EXYNOS_TMU_CLK_SENSE_ON_SHIFT);
+       counter_value |= EXYNOS_TMU_TEM1051X_SENSE_VALUE << EXYNOS_TMU_CLK_SENSE_ON_SHIFT;
+       writel(counter_value, data->base + EXYNOS_TMU_REG_COUNTER_VALUE1);
+
        tmu_irqs_enable(pdev);
        tmu_core_enable(pdev);
 }