ARC: [plat-eznps] avoid toggling of DPC register

HW bug description: in case of HW thread context switch
the dpc configuration of the exiting thread is dragged
one cycle into the next thread.
In order to avoid the consequences of this bug, the DPC register
is set to an initial value, and not changed afterwards.

Signed-off-by: Elad Kanfi <eladkan@mellanox.com>
Signed-off-by: Noam Camus <noamca@mellanox.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/plat-eznps/include/plat/ctop.h b/arch/arc/plat-eznps/include/plat/ctop.h
index 7729d3d183007b65a6f3c554cb22028c7c84151c..0c7d11022d0f8875256e64162d2ee0f1f0aa85e1 100644 (file)
--- a/arch/arc/plat-eznps/include/plat/ctop.h
+++ b/arch/arc/plat-eznps/include/plat/ctop.h
@@ -39,6 +39,7 @@
 #define CTOP_AUX_LOGIC_CORE_ID                 (CTOP_AUX_BASE + 0x018)
 #define CTOP_AUX_MT_CTRL                       (CTOP_AUX_BASE + 0x020)
 #define CTOP_AUX_HW_COMPLY                     (CTOP_AUX_BASE + 0x024)
+#define CTOP_AUX_DPC                           (CTOP_AUX_BASE + 0x02C)
 #define CTOP_AUX_LPC                           (CTOP_AUX_BASE + 0x030)
 #define CTOP_AUX_EFLAGS                                (CTOP_AUX_BASE + 0x080)
 #define CTOP_AUX_IACK                          (CTOP_AUX_BASE + 0x088)

diff --git a/arch/arc/plat-eznps/mtm.c b/arch/arc/plat-eznps/mtm.c
index 8a13f0ac49fb5e068bf4478b52f2c32053ea3035..2388de3d09ef9e71f710ec4625e20a9e85cbdc1e 100644 (file)
--- a/arch/arc/plat-eznps/mtm.c
+++ b/arch/arc/plat-eznps/mtm.c
@@ -110,6 +110,18 @@ void mtm_enable_core(unsigned int cpu)
        int i;
        struct nps_host_reg_aux_mt_ctrl mt_ctrl;
        struct nps_host_reg_mtm_cfg mtm_cfg;
+       struct nps_host_reg_aux_dpc dpc;
+
+       /*
+        * Initializing dpc register in each CPU.
+        * Overwriting the init value of the DPC
+        * register so that CMEM and FMT virtual address
+        * spaces are accessible, and Data Plane HW
+        * facilities are enabled.
+        */
+       dpc.ien = 1;
+       dpc.men = 1;
+       write_aux_reg(CTOP_AUX_DPC, dpc.value);
 
        if (NPS_CPU_TO_THREAD_NUM(cpu) != 0)
                return;