.count = 4,
.base = { 0x12500, 0x12700, 0x12900, 0x12b00 },
},
+ .max_clk = 200000000,
};
static const struct mdp5_config apq8084_config = {
.count = 5,
.base = { 0x12500, 0x12700, 0x12900, 0x12b00, 0x12d00 },
},
+ .max_clk = 320000000,
};
struct mdp5_config_entry {
if (ret)
goto fail;
- ret = clk_set_rate(mdp5_kms->src_clk, config->max_clk);
-
ret = mdp5_select_hw_cfg(kms);
if (ret)
goto fail;
+ /* TODO: compute core clock rate at runtime */
+ clk_set_rate(mdp5_kms->src_clk, mdp5_kms->hw_cfg->max_clk);
+
/* make sure things are off before attaching iommu (bootloader could
* have left things on, in which case we'll start getting faults if
* we don't disable):
/* TODO */
#endif
config.iommu = iommu_domain_alloc(&platform_bus_type);
- /* TODO hard-coded in downstream mdss, but should it be? */
- config.max_clk = 200000000;
/* TODO get from DT: */
config.smp_blk_cnt = 22;
struct mdp5_sub_block dspp;
struct mdp5_sub_block ad;
struct mdp5_sub_block intf;
+
+ uint32_t max_clk;
};
extern const struct mdp5_config *mdp5_cfg;
#include "mdp5.xml.h"
/* platform config data (ie. from DT, or pdata) */
struct mdp5_platform_config {
struct iommu_domain *iommu;
- uint32_t max_clk;
int smp_blk_cnt;
};