#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
+#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
/* codec private data */
struct wm8737_priv {
- enum snd_soc_control_type control_type;
+ struct regmap *regmap;
struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
unsigned int mclk;
};
-static const u16 wm8737_reg[WM8737_REGISTER_COUNT] = {
- 0x00C3, /* R0 - Left PGA volume */
- 0x00C3, /* R1 - Right PGA volume */
- 0x0007, /* R2 - AUDIO path L */
- 0x0007, /* R3 - AUDIO path R */
- 0x0000, /* R4 - 3D Enhance */
- 0x0000, /* R5 - ADC Control */
- 0x0000, /* R6 - Power Management */
- 0x000A, /* R7 - Audio Format */
- 0x0000, /* R8 - Clocking */
- 0x000F, /* R9 - MIC Preamp Control */
- 0x0003, /* R10 - Misc Bias Control */
- 0x0000, /* R11 - Noise Gate */
- 0x007C, /* R12 - ALC1 */
- 0x0000, /* R13 - ALC2 */
- 0x0032, /* R14 - ALC3 */
+static const struct reg_default wm8737_reg_defaults[] = {
+ { 0, 0x00C3 }, /* R0 - Left PGA volume */
+ { 1, 0x00C3 }, /* R1 - Right PGA volume */
+ { 2, 0x0007 }, /* R2 - AUDIO path L */
+ { 3, 0x0007 }, /* R3 - AUDIO path R */
+ { 4, 0x0000 }, /* R4 - 3D Enhance */
+ { 5, 0x0000 }, /* R5 - ADC Control */
+ { 6, 0x0000 }, /* R6 - Power Management */
+ { 7, 0x000A }, /* R7 - Audio Format */
+ { 8, 0x0000 }, /* R8 - Clocking */
+ { 9, 0x000F }, /* R9 - MIC Preamp Control */
+ { 10, 0x0003 }, /* R10 - Misc Bias Control */
+ { 11, 0x0000 }, /* R11 - Noise Gate */
+ { 12, 0x007C }, /* R12 - ALC1 */
+ { 13, 0x0000 }, /* R13 - ALC2 */
+ { 14, 0x0032 }, /* R14 - ALC3 */
};
+static bool wm8737_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case WM8737_RESET:
+ return true;
+ default:
+ return false;
+ }
+}
+
static int wm8737_reset(struct snd_soc_codec *codec)
{
return snd_soc_write(codec, WM8737_RESET, 0);
return ret;
}
- snd_soc_cache_sync(codec);
+ regcache_sync(wm8737->regmap);
/* Fast VMID ramp at 2*2.5k */
snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
int ret;
- ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type);
+ ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
if (ret != 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
.suspend = wm8737_suspend,
.resume = wm8737_resume,
.set_bias_level = wm8737_set_bias_level,
-
- .reg_cache_size = WM8737_REGISTER_COUNT - 1, /* Skip reset */
- .reg_word_size = sizeof(u16),
- .reg_cache_default = wm8737_reg,
};
static const struct of_device_id wm8737_of_match[] = {
MODULE_DEVICE_TABLE(of, wm8737_of_match);
+static const struct regmap_config wm8737_regmap = {
+ .reg_bits = 7,
+ .val_bits = 9,
+ .max_register = WM8737_MAX_REGISTER,
+
+ .reg_defaults = wm8737_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
+ .cache_type = REGCACHE_RBTREE,
+
+ .volatile_reg = wm8737_volatile,
+};
+
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8737_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
return ret;
}
+ wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
+ if (IS_ERR(wm8737->regmap))
+ return PTR_ERR(wm8737->regmap);
+
i2c_set_clientdata(i2c, wm8737);
- wm8737->control_type = SND_SOC_I2C;
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8737, &wm8737_dai, 1);
return ret;
}
- wm8737->control_type = SND_SOC_SPI;
+ wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
+ if (IS_ERR(wm8737->regmap))
+ return PTR_ERR(wm8737->regmap);
+
spi_set_drvdata(spi, wm8737);
ret = snd_soc_register_codec(&spi->dev,